Hi,
In the Cortex A15 TRM Revision r4p0, it says the PMU on A15 is based on PMUv2 architecture. And on this page (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438i/CHDCHAED.html), it shows a bunch of PMUv2 events. (start from 0x10). For example, the 0x13 is "memory access".
But in Chapter 29.6 of OMAP5 TRM, the pmu events are the same as OMAP4. For example, the 0x13 is "java byte code executed", not "memory access".
Why is the difference? I guess maybe the A15 on OMAP5 is of an earlier revision?
My purpose of using PMUv2 event is to count "memory access", is there anyway to achieve this on OMAP5 other than using PMU?
Thank you very much!