Hello,
In the current Syslink example SCD, what I understood is as below
1. VPSS captures the video frame and copies it into the shared memory.
2. DSP locks that part of the shared memory until it finishes the processing on that frame.
3. DSP unlocks the shared memory and VPSS display will display the processed video.
My doubts are as below,
1. Until Capture releases the buffer, will DSP and Display be in idle?
2. Same when DSP is processing, will capture and display in idle mode?
if so, how can we achieve the pipeline here?