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DDR2 controller configuration for OMAP L138 @ 456MHz

Hi,

          We are trying to configure our custom board with OMAP L138 and Micron MT47H128M16RT DDR2 RAM. The Ram is a 128 Meg x 16 (16 Meg x 16 Bit x 8 banks) RAM. The RAM has a Timing – cycle time of 2.5ns @ CL = 5 (DDR2-800). The RAM has a page size of 1024.

          We are able to run this configuration at a CPU clock of 300 MHz. MCLK was chosen at 150 MHz. We used OMAP-L1x/C674x/AM1x mDDR/DDR2 Memory Controller Register Setting Calculator for finding the register values required for this.

          Now we want to run the CPU at its maximum frequency ie., @456MHz. We preserved the MCLK frequency at 150MHz. But we found that above a CPU clock of 360MHz, when we modify a RAM location the change is reflected. But data at multiple locations get corrupted.

          Is there any dependency between VCLK and MCLK? As far as I understood from the datasheet and from various forum postings, there isn’t any dependency.

          Also it is mentioned two bits, DDR_PDENA and CMOSEN in the DDR_SLEW register should be cleared for DDR2 operation. But in practical, we found that both need to be set for proper operation at 300 MHz.

          Kindly help me to solve the issue.

 Regards

Sreejaya

  • Hi Sreejaya,

    What is your CVDD value?  If the CVDD is 1.2V it works well up to 375 MHz CPU frequency

    The Maximum CPU frequency 456 MHz is achievable when the core voltage CVDD is set to 1.3V  

    Tyr changing the core voltage to 1.3V and check once

    Regards

    Antony

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  • Hi Antony,

    We have programmed PMIC to out 1.3V at CVDD. Also RVDD is set to 1.3V by resistor divider.

    As you have mentioned, if CVDD is 1.2V,it should work upto 375MHz. But I was not able to clock the CPU above 360MHz without mentioned DDR2 issue.

    Regards,

    Sreejaya

  • sreejaya varma said:
    But I was not able to clock the CPU above 360MHz without mentioned DDR2 issue.

    I don't understand the connection here...  The CPU is clocked by PLL0 and the DDR2 is clocked by PLL1. Changing the frequency on one should not affect the other.  The DDR2 max frequency is 156 MHz.  You should be able to change the CPU frequency at will and not have any effect whatsoever on the DDR2.  If increasing the frequency of the CPU above 360 MHz is causing an issue then it sounds to me like you have a power issue related to the CPU rail.  In particular you should make sure you're supplying the proper voltage and have sufficient decoupling caps.