From Page 3 of the Using the TMS320C5515/14/05/04 Bootloader (Rev. B)
If none of these devices has a valid boot-image, the bootloader modifies the CPU clock setup as follows:
• If CLK_SEL = 0, the bootloader powers up the PLL and sets its output frequency to 36.864 MHz
(multiply 32768 Hz RTC clock by 1125).
• If CLK_SEL = 1, the bootloader powers up the PLL and sets it to multiply CLKIN by 3.
I have found this factor to be 4, not 3. So I get a clock of 48 MHz at main(). Note, I am not using a gel scripts. Could this be a documentation error, or do I not understand the operation of my system?
Thanks,
Mark
