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memory map issue

Jack 123
Intellectual 990 points

Hi,

I am using RDK4.1 and I want to modify the linux start address from 0xC0000000 to 0xD000000.

I use

"mkimage -A arm -O linux -T kernel -C none -a 0xd0008000 -e 0xd0008000 -n 'Linux-2.6.37' -d
arch/arm/boot/zImage uImage_DM816X_UD_DVR"

 to change the adress, but when I execute load.sh, the program will stop in 

Attached to slave procId 2.
Loaded file ../firmware/dvr_rdk_fw_m3vpss_2048M_512M.xem3 on slave procId 2.
Started slave procId 2.
After Ipc_loadcallback status [0x00000000]
*** Platform_startCallback: Ipc_attach timeout

Do you have any idea ?

  • 0
    TI__Guru 59700 points

    Pls share the console logs from start of uboot to execution of load.sh and also changes done to the file

    /dvr_rdk/mcfw/src_bios6/cfg/ti816x/config_2G.bld

  • 0 in reply to Badri Narayanan
    Intellectual 990 points

    Hi Badri,

    Thanks for your replay.

    http://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components-files/717/0458.test.7z

  • 0 in reply to Jack 123
    TI__Guru 59700 points

    I see the following issue with change in config.bld.

    var SR3_FRAME_BUFFER_EXTRA_ADDR = LINUX_ADDR                    + LINUX_SIZE;
    var TILER_ADDR                  = SR3_FRAME_BUFFER_EXTRA_ADDR   + SR3_FRAME_BUFFER_EXTRA_SIZE;

    Change should be

    var SR3_FRAME_BUFFER_EXTRA_ADDR = DDR3_ADDR;

    var TILER_ADDR                  = SR3_FRAME_BUFFER_EXTRA_ADDR   + SR3_FRAME_BUFFER_EXTRA_SIZE;

    After this change rebuild with make dvr_rdk and confirm from the map file shows

    SR2_FRAME_BUFFER_EXTRA starts at address 0xC000_0000 and

    TILER_ADDR starts at address 0xC800_0000

    Map file will be present under /dvr_rdk/build/dvr_rdk/bin/ti816x-evm

     

     

  • 0 in reply to Badri Narayanan
    Intellectual 990 points

    Hi Badri,

    This layout is provided by RDK4.1, I only adjust memory size for my application. If I use "var SR3_FRAME_BUFFER_EXTRA_ADDR = DDR3_ADDR", it will compile fail. If I reduce SR2_FRAME_BUFFER_SIZE, the program can be run on the board. It seems like vpssm3_sva has some constraint which needs to set under 0xC0000000.  

  • 0 in reply to Jack 123
    TI__Guru 59700 points

    Yes  vpssm3_sva should be less than 0xC000_0000.But the change you have done is

    Change

    var LINUX_ADDR                  = DDR3_ADDR                     + 1 * GB;

    to

    var LINUX_ADDR                  = DDR3_ADDR                     + 1 * GB + 256 * MB; - To start Linux at 0xD000_0000

     

    But you have wrongly not updated

    var SR3_FRAME_BUFFER_EXTRA_ADDR = LINUX_ADDR                    + LINUX_SIZE;
    var TILER_ADDR                  = SR3_FRAME_BUFFER_EXTRA_ADDR   + SR3_FRAME_BUFFER_EXTRA_SIZE;

    This will result in TILER_ADDR going beyond 2G which will cause crash.

    There is no change done to vpssm3_sva in the changes you have done.

    The change I mentioned was to fix your modification.

     

  • 0 in reply to Badri Narayanan
    Intellectual 990 points

    Hi Badri,

    I don't understand why you said the TILER_ADDR will go beyond 2G. The attached file is the layout for my configuration, and I don't see any problem.

    If I need to increase SR2_FRAME_BUFER_SIZE, how could I modify this configuration to make vpssm3_sva less tan 0xC0000000 ?

    Fullscreen 7651.2Glayout.txt Download 
    Memory Map - 2GB DDR
     0x80000000     +--------------------+
                    |                    |
                    |       196 MB       | (SR1) Bitstream buffer {Cached on A8. Cached on M3, although access by DMAs}
                    |                    |
     0x8C400000     +--------------------+
                    |                    |
                    |        4 MB        | Video M3 Code
                    |                    |
     0x8C800000     +--------------------+
                    |                    |
                    |       15 MB        | Video M3 BSS
                    |                    |
     0x8D700000     +--------------------+
                    |                    |
                    |        3 MB        | Video M3 Data
                    |                    |
     0x8DA00000     +--------------------+
                    |                    |
                    |       2.5 MB       | VPSS M3 Code
                    |                    |
     0x8DC80000     +--------------------+
                    |                    |
                    |       20 MB        | VPSS M3 BSS
                    |                    |
     0x8F080000     +--------------------+
                    |                    |
                    |        6 MB        | VPSS M3 Data
                    |                    |
     0x8F680000     +--------------------+
                    |                    |
                    |       1.5 MB       | DSP Code
                    |                    |
     0x8F800000     +--------------------+
                    |                    |
                    |       24 MB        | DSP Data
                    |                    |
     0x91000000     +--------------------+
                    |                    |
                    |       976 MB       | (SR2) Frame Buffer Region {VPSS - Video M3 Frame Buf}
                    |                    |
     0xCE000000     +--------------------+
                    |                    |
                    |       128 KB       | Video M3 exception context
                    |                    |
     0xCE020000     +--------------------+
                    |                    |
                    |       128 KB       | VPSS M3 exception context
                    |                    |
     0xCE040000     +--------------------+
                    |                    |
                    |      22.75 MB      | (SR0) Syslink MsgQ/IPC List MP - <Non-cached on M3>
                    |                    |
     0xCF700000     +--------------------+
                    |                    |
                    |        2 MB        | VPSS M3 - VPDMA Descriptor
                    |                    |
     0xCF900000     +--------------------+
                    |                    |
                    |        2 MB        | VPSS M3 - FBDev Shared Memory
                    |                    |
     0xCFB00000     +--------------------+
                    |                    |
                    |        2 MB        | Host - VPSS M3 Notify(For FBDev)
                    |                    |
     0xCFD00000     +--------------------+
                    |                    |
                    |        1 MB        | Remote Debug Print
                    |                    |
     0xCFE00000     +--------------------+
                    |                    |
                    |        2 MB        | Shared Memory application inter process communication on A8
                    |                    |
     0xD0000000     +--------------------+
                    |                    |
                    |       512 MB       | Linux
                    |                    |
     0xF0000000     +--------------------+
                    |                    |
                    |       128 MB       | SR3_FRAME_BUFFER_EXTRA - Extra heap for video frame buffers.Not mapped on M3
                    |                    |
     0xF8000000     +--------------------+
                    |                    |
                    |       128 MB       | Tiled 8-bit + 16-bit region
                    |                    |
     0xFFFFFFFF     +--------------------+

  • 0 in reply to Jack 123
    TI__Guru 59700 points

    Ok the memory map changes are clear now. They wont work. The only regions that can be beyond 0xC000_0000 are

    TILER,SR3 and LINUX. All other regions should end before 0xC000_0000.

    There is actually no need to increase SR2. If memory is insufficient in SR2 it will try to allocate from SR3 automatically.

  • 0 in reply to Badri Narayanan
    Intellectual 990 points

    Hi Badri,

    Thanks for your explain.