• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 598 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Problem with parallel use of CPSW and McSPI

Robert R
Prodigy 230 points
Other Parts Discussed in Thread: CC1200

Hello,

i want to use McSPI to communicate with a CC1200 and parallel send UDP Datagrams with CPSW. For that i take the enetecho example from StarterWare.

If I test the functionality of each modul alone there are no problems. But if i initalize first McSPI1 and then CPSW, i cannot read or write registers of McSPI1. my code:

   McSPI1init(); // my own function 

   unsigned int ipAddr;
    LWIP_IF lwipIfPort1, lwipIfPort2;

    MMUConfigAndEnable();

#ifdef LWIP_CACHE_ENABLED
    CacheEnable(CACHE_ALL);
#endif

    CPSWPinMuxSetup();
    CPSWClkEnable();

    /* Initialize console for communication with the Host Machine */
    ConsoleUtilsInit();

... and so on

After McSPI1init() i check McSPI functionality in single steps with "HWREG(0x481A0138) = 0xAA;" to write TX register and "int test = HWREG(0x481A013C);" to read RX register. There is no problem until CPSWPinMuxSetup(). when i try to send something with SPI in or after CPSWPinMuxSetup(), there is no change in registers.

McSPI configuration:

- OCP and Functional clocks are maintained.

-  If an idle request is detected, the request is ignored and keeps
on behaving normally.

Is it possible that pimuxing for CPSW disable something in PRCM, Control Modul or interconnects that obstruct McSPI1?

  • 0
    TI__Intellectual 1480 points

    Hi,

    Please check moving

    1. Do pinmux and clock config of McSPI before calling module init.

    2. And move McSPI1init() after  CacheEnable(CACHE_ALL);

    Regards,

    Ramesh D

  • 0 in reply to Ramesh Dandamudi
    Prodigy 230 points

    Thanks for your reply Ramesh but it does change anything. I think there is a problem with ethernet activities when I use SPI. Is it possible that a Interrupt from CPSW not just stop a function in main.c, but also kill it?

    I send a byte with SPI and wait till RX flag says I receive a byte. If I just initialize CPSW I do not get a RX flag. So main.c is in a infinite loop waiting for RX flag. If I walk throw my code in single steps there is no problem.

    Would it help when I stop CPSW activity before working with SPI and how can I do that without reset CPSW configuration?

    Or is it better to put SPI work in interrupt routines than software?

  • 0 in reply to Ramesh Dandamudi
    Prodigy 230 points

    Hi Ramesh,

    it works when I call CacheDisable(CACHE_ALL); bevor using SPI. But then CPSW does not work as I thought so.

    What is happening in Cache that disturb SPI?

  • 0 in reply to Robert R
    Prodigy 230 points

    I cannot solve the problem but bypass it.


    Bevor I use SPI I call "CacheDisable(CACHE_ALL);" and after it "CacheEnable(CACHE_ALL);". now I just can receive anything with CPSW if SPI is not used. It is no parallel use of moduls but at least it works.

    Thank you for your hints Ramesh.