SRIO interface issue on C6657

Hi TI Lady,

TI has released the SRIO driver and example projects along with MCSDK for Keystone I devices. Please download the latest MCSDK from below link.

http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/latest/index_FDS.html

Driver: ..\pdk_C6657_1_1_2_6\packages\ti\drv\srio

Examples: ..\pdk_C6657_1_1_2_6\packages\ti\drv\exampleProjects

If the MCSDK driver and example does not help you to solve the issue then provide more information about the issue.

Do you use C6657 EVM or custom board?

Is it a custom SRIO driver?

What are all the steps followed for debug the issue? 

How the FPGA srio core is validated? 

Have you executed the loopback test? etc

Thanks.

 we are trying to establish SRIO communication between TI DSP (Initiator) and Xilinx FPGA (Target) with point to point  configuration. We exercised SRIO loopback code example (project)  from TI, but we could not succeed .

Do you have any point to point communication example code on SRIO driver? application note will help us.

 Also, we tried to download a new 90 day trial of CCS, but after download, it continues to ask for liscence number. Please help

Hi TI Lady,

What is error you getting on SRIO loopback example? Please provide more information so that we can help you.

Also, I will check with team for point to point example/app note availability.  

Please post your CCS license related queries on CCS Forum to get faster response.

Thanks.

Updates on our case for the benefits of others.

From TI:

Can you verify that you are running a gel script prior to loading and running the example, and that it is the latest gel at:

http://software-dl.ti.com/sdoemb/sdoemb_public_sw/ti_emupack_keystone1/1_0_6_0/exports/ti_emupack_keystone1_setup_1.0.6.0.exe

 1)      Achieving Port_ok in the RIO_SP(n)_ERR_STAT is the very first step in initialization.  If you aren’t getting a port_ok, it usually means something is physically wrong (connection, reflck related, etc)  or the initialization is not correct (link partners data rates or port widths don’t match). It looks like you are not seeing any errors, but it is hard to tell from the dump you provided.  Please run this diagnostic gel and provide the dump from it.  Directions are in the zip file.  http://processors.wiki.ti.com/images/6/60/Keystone_SRIO_bug_report_gel.zip

2)      The software error recovery and ACKID alignment document that is referred to in the e2e post I provided is only valid after port_ok is achieved, either when the device is stuck in an errored state or when a fatal error is reached from AckIDs being non-aligned.  I’d suggest you set breakpoints in the code just after initialization to prevent any packets from being set and verify port_ok is happening before moving on.

3)      Not sure what you are trying to accomplish by sending a reset link-request to the partner, and I can’t explain the behavior.  Lets not concentrate on this one right now. 

4)      Have you compiled with full symbolic debug?

5)      This is the software error recovery document again.  Again, lets not worry about this right now.  But I would suggest you change the VMIN setting as described here:  http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/196080/850001.aspx#850001