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DDR SDRAM

Inderjit Bains
Expert 2745 points
Other Parts Discussed in Thread: OMAP-L138

Are 22 Ohm series resistors required for DDR SDRAM?  The documentation does not mention them, but they are included in the Logic schematic.

  • 0
    TI__Mastermind 43875 points

    Inderjit,

    Series resistors are typically used to compensate and match the trace impedances so their requirement and value will depend very much on the physical layout of your PCB and the exact DDR memory you have connected.

    The only way to be 100% sure what value is correct and whether they are even needed at all is to run board level simulations to verify the driver, trace and receiver characteristics.

    If the DDR is close to the OMAP device and the traces are impedance matched then there is less likelyhood that series resistors are required.

    It is good practice to include the option for series resistors so that you can potentially "tweak" the value should you have issues when you get your initial PCBs assembled.

    Kind regards,

    Steve.

  • 0
    TI__Guru 62975 points

    Inderjit,

    Can you specify which OMAP product your are referring to?  Thanks

    -Tommy

  • 0 in reply to tlee
    Expert 2745 points

    OMAP L138.

  • 0 in reply to Inderjit Bains
    TI__Mastermind 27585 points

    Please refer to the OMAP-L138 data sheet DDR section for information on DDR terminations. They are not required.

  • 0 in reply to jc-ti
    Genius 4530 points

     Hi Jeff,

    Does OMAP-L138 have internal series termination resistors, by default, present on chip like some FPGAs from ALTERA and XILINX families have?

    Because, since DDR signals are relatively high speed signals, I feel that series termination resistors generally help to avoid the reflections present on track. This helps in avoiding transient overshoots for data signals, if I am not wrong.

    I would just like to confirm this behaviour of OMAP-L138.

    Thanks and Regards,

    Sid

  • 0 in reply to Sid
    TI__Mastermind 27585 points

    No, there are not internal terminators, and we don't support the On Die Termination (ODT) that the DDR memories have.

    We created the layout rules to constrain the reflections to accepable levels that meet the timings even when terminators are not used. If there are EMI concerns, then the terminators can be used to dampen it, but the DDR interface for OMAP-L138 has been verified by TI to work without terminators if our layout rules are followed.

    Jeff

  • 0 in reply to jc-ti
    Expert 2745 points

    For DDR_DQGATE0 and DDR_DQGATE1:  recommendation is to route to DDR and back to DDR_DQGATEx with the same constraints as used for DDR clock and data (Table 3-9 of SPRS586A).  Does this mean that the trace length should be same as the average length for DDR DQ lines, or double?

  • 0 in reply to Inderjit Bains
    TI__Mastermind 27585 points

    Sorry that table is not very  clear. See table 6-37 for more specific DQGATE routing instructions.

    "[DQGATE routing] is the sum of the length of the CK net plus the average length of the DQS0 and DQS1 nets."

    Jeff