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Sending large data with enetLwip_sysbios

Prad1
Genius 3825 points

Other Parts Discussed in Thread: SYSBIOS

Hi,

We are using HTTP server example(enetLwip_sysbios) provided in the AM335x ISDK( ICE2 board).
Currently we are having problem in sending large bytes of data over TCP/IP.
We need to transfer around 2MB of data from HTTP server to the client.

We have modified the httpd.c(http_recv() function) in order to send large data,
but currently we are able to send only around 1K of data,
the transmission is closed for more than 1K and we are not able to trace the problem.

I would like to confirm if it is possible to use lwip based sample code to send large volume of data?
and I assume in the sample code all the work is done using the interrupt handlers,
so the response may be late.

Please let me know what are the points or necessary things to be done in order to
handle large data on lwip based application.

Regards
Prad

  • 0
    TI__Expert 7360 points

    Prad,

    Can you check if the issue is related to this post? - http://e2e.ti.com/support/embedded/tirtos/f/355/p/318448/1108003.aspx

    Regards,
    Vinesh

  • 0 in reply to Vinesh Balan
    Genius 3825 points

    Hi Vinesh,

    Thank you so much for the information.
    We have commented the port configuration as per your comment on that post.
    But unfortunately we are not able to solve the issue.

    Actually this is our first project on LWIP, we don't know how exactly to analyse the issue.
    Just in case I am attaching our source code httpd.c where we have added few lines(http_send_data)
    to send the data. We don't know if this is the correct way to implement.
    If possible please let me know if there is any reference or suggestions.

    Regards
    Prad.

    3348.httpd.c

  • 0 in reply to Prad1
    TI__Expert 7360 points

    Prad,

    You can find more info about LWIP here - http://savannah.nongnu.org/projects/lwip/

    On debugging the CPSW driver, most of the functions are contained in cpswif.c and lwiplib.c . You can try analyzing the RX/TX ISRs when you get the issue.

    Regards,
    Vinesh

  • 0 in reply to Vinesh Balan
    Genius 3825 points

    Vinesh,

    Thank you for the pointers.

    Please let me ask a basic question about the MMU settings in SYS/BIOS based application.
    Is it required to enable MMU for any applications?

    It seems the ISDK sample codes like "enetLwip_sysbios" are enabling the MMU.
    But little confusion about the place where it is enabled.

    According to many other posts(like here), when using SYS/BIOS the MMU settings are done
    through the configuration file "app.cfg",
    but in case of TI's ISDK sample code the .cfg file disables MMU with "Mmu.enableMMU = false;".
    And there is a MMU configuration function("MMUInit(applMmuEntries);") in the Main.c file.

    I would like to know which is the better way to do the MMU configuration in case of using SYS/BIOS.

    Regards.
    Prad

  • 0 in reply to Prad1
    TI__Expert 7360 points

    Prad,

    Yes, you can do it both ways. But we have seen issues in scenarios where the application does a restart(software triggered), that's the reason we follow the same sequence in all applications.

    Regards,
    Vinesh

  • 0 in reply to Vinesh Balan
    Genius 3825 points

    Hi Vinesh,

    I am sorry to bother you.
    I have one last question regarding the MMU settings.

    In the "enetLwip_sysbios" sample code the MMU configuration is done through the
    function ("MMUInit(applMmuEntries);") and in the MmuEntries the DDR memory region
    from 0x81000000 is set as "SYS_MMU_CACHEABLE" as below.

    SYS_MMU_ENTRY applMmuEntries[] = {
             {(void*)0x81000000,SYS_MMU_CACHEABLE}, //DDR - Non bufferable| Cacheable

    I would like to know why is it set from 0x81000000 and not the starting address of
    DDR 0x80000000. And with this setting how much DDR memory is set as Cacheable.

    Regards
    Prad

  • 0 in reply to Prad1
    TI__Expert 7360 points

    Prad,

    If you check the am335x.cmd , you'll see that the bss is forced to 0x81000000. This area is required to be Cached for proper functioning of the application(otherwise you'll see drop in packets/receiving malformed packets).

    An entry in SYS_MMU_ENTRY sets properties for 1MB block(in this case 0x81000000 to 0x81100000)

    Regards,
    Vinesh

  • 0 in reply to Vinesh Balan
    Genius 3825 points

    Thank you.