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Using UIA LoggerSM and Cache API simultaneously for ARM - DSP communication

Jose Lopez1
Intellectual 835 points
Other Parts Discussed in Thread: SYSBIOS

Hi,

I have an application that communicates ARM and DSP cores w/ IPC MessageQ system. Currently using z3-DM8168 and ezsdk-5_05_01_04.

arm binary uses:

#include <ti/syslink/utils/Cache.h>

dsp firmware uses:

#include <ti/sysbios/hal/Cache.h>

#include <xdc/runtime/Diags.h>

#include <xdc/runtime/Log.h>

Have been using Diags and Log modules since some time with UIA, here is the UIA code of the .cfg script

var LoggerSM = xdc.useModule('ti.uia.runtime.LoggerSM');
LoggerSM.partitionId = MultiProc.id;
LoggerSM.bufSection = ".loggerSM";
LoggerSM.sharedMemorySize = 0x20000;
LoggerSM.numPartitions = 3;
LoggerSM.isTimestampEnabled = true;
Defaults.common$.logger = LoggerSM.create();

Now that I use cache for coherency of data have lost my Logs at all and I need them to track what the DSP is doing at runtime. 

I saw in this forum http://e2e.ti.com/support/embedded/tirtos/f/355/p/241491/845373.aspx#845373  that cache cannot be enabled for the shared memory that is being used for the Log data.

I have my memory table .bld file that tells where the Logger SM is going to be placed, consulted xdc.bld package documentation saying that there is an attribute .cacheable that can be set to false so I can enable UIA and cache support for the Firmware at the same time.

The build broke and said that .cacheable attribute is not supported for my platform, that is: Build.platformTable["ti.platforms.evmTI816X"]so I think for now that one is not an option for me.

Does some Expert knows how can do some memory management so I can use Cache API at same time I use UIA?

Apprecciate some help on this. THANKS !

 

  • 0
    TI__Mastermind 32475 points

    I'm not en expert in this area (UIA) but looks like you will have to disable the CACHE for that memory region in order to use LoggerSM but sounds like this is where you were coming from?

    Looks like its not possible to have both...Caching enable and Logging via SharedMemory at the same...Unless you can disable caching for just that memory segment you are using for logging.

    Judah

  • 0 in reply to judahvang
    Intellectual 835 points

    Hi Judah,

    Can you point me to available ti | xdc packages and modules that I can use to disable cache for specific memory regions?

    Documentation/ examples would also help. 

    Thanks,

    -Jose L.

  • 0 in reply to Jose Lopez1
    TI__Mastermind 32475 points

    Jose,

    Look at the Cache module for c64+ devices located at <SYSBIOS>/packages/ti/sysbios/family/c64p/Cache:
    var Cache = xdc.useModule('ti.sysbios.family.c64p.Cache');

    There are a bunch of MARs (memory attribute registers) which give you cacheability control over a 16MB range.  What you can try to do is place your LoggerSM buffer into a external memory region and then change the cacheability of this region to be non-cacheable.  This way your cache will still be enabled for your code but not enabled just for the LoggerSM buffer.

    For example:

    Cache.MAR128_159 = 0x0001;   // this would enable caching to memory region 0x80000000 - 0x81000000

    Judah 

  • 0 in reply to judahvang
    Intellectual 835 points

    Will try that, 

    I am looking at the C674x megamodule guide. Does the external memory spaces that the MAR control correspond the physical addresses of the SoC?

    If that is so, I have just to look the MAR that holds the base address of the LoggerSM block. Just saying to see if I am understanding things right.

    Regards

  • 0 in reply to Jose Lopez1
    TI__Mastermind 32475 points

    Yes, that is correct.  Just look at the physical address and determine which MAR corresponds to it.

    An easy way to determine which MAR is just look at the 2 MSB of the memory range.

    0x[80]000000 = MAR 128
    0x[A0]000000 = MAR 160
    0x[E2]000000 = MAR 226
    0x[87]000000 = MAR 135

    Judah

  • 0 in reply to judahvang
    Intellectual 835 points

    Judah,

    Thanks for your answers, I disabled Cache for the LoggerSM buffer UIA uses, now I can have cached data between cores and Logs to track/debug DSP activity.

    Thank you very much !