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Is the truncated-16bit CRC Code availible for BT.1120 16bit Mode in DM8168?

Hi,

   I am now using EVM8168 for developing.  I managed to generate some dummy 1080p60 BT.1120 video frame by FPGA and send these dummy frame into DM8168 via VIN0.

   When dealing with the FPGA HDL, I was confused by the CRC code.  Because of the 20bit BT.1120 standard, the polynomial generator equation is definded as below:

     EDC(x) = x^18 + x^5 + x^4 + 1;

   That means, a 20-bit CRC code would be generated and recorded in the Error detection code

     However, the DM8168 only supports 16bit-BT.1120 VIN port mode, which indicates that we should leave the last 2 bits (2 LSB) outI am not sure whether the CRC mechanism would work, when we tried to transfer BT.1120 data with a truncated-16bit CRC code.

     Could you please tell me how a 16bit-truncated CRC code would be work in our DM8168 system?

     Thank you!

Naroah

Feb/24/2014

  • Hi Naroah,

     

    I think this CRC is not part of the SAV/EAV code, correct? Since they are not part of the SAV/EAV code, VIP does not care. it just works based on the SAV/EAV sync codes.

     

    Regards,

    Brijesh

  • Hi Brijesh,

         Thank you for your reply, but I am getting much more confused...

         No, CRC is not part of the SAV/EAV code, although CRC is generated by the data from SAV/EAV and Active Data line.  I suppose that the DM8168 would take advantage of CRC field data and cast error info while data corruption exists.  And yet according to your words, it seems that DM8168 never concerned anything about the CRC field in BT.1120 frame package.  That's a bit weird. 

        Paradoxically, granted DM8168 does concern and take advatage of the CRC field, a truncated-16bit data field is not sufficient for DM8168 to take corrective action against data corruption by using a CRC check scheme.  I was confused by this situation.

    And a few additional questions:

        1. Does DM8168 VIN port perform CRC checking when capturing Bt.1120 raw data from external source?

        2. Is it possible to feed VIN0 with frame data, even if the data in CRC field are wrong?

        3.  Shall I design a FPGA module for generating CRC code to fill my dummy video frame?

        I am sincerely looking forward to your reply.

    Naroah

    Feb/24/2014

  • Hi Noah,

     

    According to BT1120 specs, CRC fields, line numbers are required for Bit serial interface whereas VIP supports bit parallel interface only, so this CRC is not supported in VIP. 

     

    Regards,

    Brijesh

  • Hi Brijesh,

        Thank you for your reply!  It helps me a lot!

        Bloody great...  You are right.  I perused the BT.1120 spec again and found this:

          And what I refered in my threads are according to the Section 4...

         One more thing, I have downloaded the lastest version of the BT.1120 spec.  The section of "Bit parrallel Interface" is absent (or removed ) in this version.  Which version of BT.1120 spec shall I refer, in order to find the bit parralled interface?


        

    Naroah

    Feb/14/2014

  • Hi Brijesh,

        I have finnally found the Bit Parallel Interface spec in the 2007 version of the:

     
       Thank you for your support!
     
    Naroah
    Feb/24/2014
     
    PS. I have your reply verified. 
  • Hi Naroah,

     

    I am refering to ITU-R BT.1120-6, this has information about bit parallel interface.

     

    Regards,

    Brijesh