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Atomic conditional before entering IDLE



Hi, I'm developing a software for C6745 whose operation, basically, is:

/*00*/ bool bWorkPending=false;
/*01*/ while(true)   
/*02*/ {    
/*03*/     if(bWorkPending==false) 
/*04*/     {
/*05*/          asm(" IDLE");  
/*06*/     }
/*07*/     else
/*08*/     {
/*09*/         doWork();
/*10*/     }
/*11*/ }

The bWorkPending variable is updated within an ISR, however, sometimes the interruption occurs between lines 3 and 5, leaving the DSP in IDLE state when there is work to be done.

Obviously the question is ... How can I make the comparison and entry into IDLE state atomically?

Thanks in advance.

  • Hi Alfonso,

    In this forum, there were several good posts on this topic, "atomic". I recommend you to use the search option above in this link by giving "atomic" and browse through those threads to check for the answers. Few are listed below.

    https://e2e.ti.com/support/dsp/omap_applications_processors/int_omapl1x_dsps/f/116/t/261709.aspx

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/270760.aspx

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/110942/396600.aspx#396600

     

    Regards,

    Shankari

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  • Hi Shankari,

    Needless to say, I've searched the IT forums and internet before asking my question.

    I found information on my problem for other DSP, but not for the C6745, so I put the question in this forum.

    I recommend you read the questions well, since your links are about sharing memory between processors, and this has nothing to do with my problem.


    Greetings.

  • Hi Alfonso,

    A correct solution can only be given after understanding your complete design flow. There are many open questions. Few are here.

    1. where do you again reset the bworkPending = false in the main loop() once it set in the ISR.

    2. Consider you entered into the IDLE state. After entering into the IDLE state how do you wake up? e.t.c., What is the mechanism used to go-to-sleep--->wake-up--->go-to-sleep-->

    3. Don't you see any significance of having volatile type here?

    If the use case is clear, you can consider using any of the synchronization mechanism such as mutex,semaphore e.t.c,

    However, I have some generic suggestion.

    1. You can treat the portion of code /*03/ to /*06/ as a critical section and protect it. Protect the code; Enter into the critical section complete the current task; unprotect the code; and then jump into other routines.

    2. Disabling the interrupts before entering into the "IDLE state" and then enabling the interrupts may also be an option.

     

    Regards,

    shankari

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  • Hello Shankari,

    No problem if you need more information, xD. Regarding your questions:

    1. The bWorkPending flag is set in an ISR and is cleared at the end of doWork().

    2. Any interruption wakes up the processor from IDLE state.

    3. This is not a problem of code optimization or memory sync, just the interruption occurs between lines /*03*/ and /*05*/.


    I am not using any BIOS or OS, simply C code and CSLR, therefore, semaphores and mutexes are not an option.

    Disable interruptions before entering IDLE state causes the processor to remain forever in IDLE state, since it is an interruption who wakes up the processor from that state.

    Regards,

    Alfonso.