AM3874 mmc module default status

Michi,

AM3874 device has 3 MMC instances of the MMC/SD controller: mmc0, mmc1 and mmc2, see the AM3874 datasheet.

After power-on reset (or any other reset), the 3 MMC modules are disabled. You can check AM3874 TRM, chapter PRCM. See these three registers:

CM_ALWON_MMCHS_0_CLKCTRL
CM_ALWON_MMCHS_1_CLKCTRL
CM_ALWON_MMCHS_2_CLKCTRL

The reset values of these registers show us that the 3 MMC modules are disabled:

[17:16] IDLEST = 0x3 (reset value) - Disable: Module is disabled and cannot be accessed
[1:0] MODULEMODE = 0x0 (reset value) - DISABLED: Module is disable by SW. Any INTERCONN access
to module results in an error, except if resulting from a module wakeup (asynchronous wakeup).


Then it is up to the software which MMC instance/module (mmc0, mmc1, mmc2) should be initialized/enabled and used.

In the EZSDK/PSP, MMC1 is only used. MMC1 is enabled and configured after power-on reset, enabled and configured from the software.

Best Regards,
Pavel

Dear Pavel-san,

Thank you for your support.

My customer modified the code in evm.c of U-Boot as the below.

 /* HSMMC del  uzawa 140303
 __raw_writel(0x2, CM_ALWON_HSMMC_CLKCTRL);
 while(__raw_readl(CM_ALWON_HSMMC_CLKCTRL) != 0x2);
  */
 /* MMCHS_0 add  uzawa 140303 */
 __raw_writel(0x2, CM_ALWON_MMCHS_0_CLKCTRL);
 while(__raw_readl(CM_ALWON_MMCHS_0_CLKCTRL) != 0x2);

 /* MMCHS_1 add  uzawa 140303 */
 __raw_writel(0x2, CM_ALWON_MMCHS_1_CLKCTRL);
 while(__raw_readl(CM_ALWON_MMCHS_1_CLKCTRL) != 0x2);

But customer had some error messages as the below.

error: 'CM_ALWON_MMCHS_0_CLKCTRL' undeclared (first use in this
function)
evm.c:746: error: (Each undeclared identifier is reported only once
evm.c:746: error: for each function it appears in.)
evm.c:750: error: 'CM_ALWON_MMCHS_1_CLKCTRL' undeclared (first use in this
function)
make[1]: *** [evm.o] Error 1
make[1]: Leaving directory
`/home/yoshiga/rowboat-android-sn/u-boot-04.00.00.12/board/ti/ti8148'
make: *** [board/ti/ti8148/libti8148.a] Error 2

Please let me know where CM_ALWON_HSMMC_CLKCTRL register should be defined.

I can't find its source.

I appreciate your quick reply.

Best regards,

Michi 

Michi-san,

In AM3874 U-boot, only MMC1 (CM_ALWON_HSMMC_CLKCTRL) is defined:

ti-ezsdk_dm814x-evm_5_04_00_11/board-support/u-boot-2010.06-psp04.04.00.01/include/asm/arch-ti81xx/cpu.h

#ifdef CONFIG_TI814X
#define CM_ALWON_HSMMC_CLKCTRL        (PRCM_BASE + 0x1620)
#endif

You should update the cpu.h file with the MMC0 and MMC2 clock enable registers, like below:

#ifdef CONFIG_TI814X
#define CM_ALWON_HSMMC_0_CLKCTRL        (PRCM_BASE + 0x161C)
#define CM_ALWON_HSMMC_CLKCTRL        (PRCM_BASE + 0x1620)
#define CM_ALWON_HSMMC_2_CLKCTRL        (PRCM_BASE + 0x1624)
#endif

And if you want to rename the MMC1 clock enable register from CM_ALWON_HSMMC_CLKCTRL to CM_ALWON_HSMMC_1_CLKCTRL, you should update cpu.h as:

#ifdef CONFIG_TI814X
#define CM_ALWON_HSMMC_0_CLKCTRL        (PRCM_BASE + 0x161C)
#define CM_ALWON_HSMMC_1_CLKCTRL        (PRCM_BASE + 0x1620)
#define CM_ALWON_HSMMC_2_CLKCTRL        (PRCM_BASE + 0x1624)
#endif

Best regards,
Pavel

Dear Pavel-san,

Thank you for your quick reply.

Your information is very helpful for me.

I appreciate your support.

Best regards,

Michi

Dear Pavel-san,

Thank you for your support.

I have one more question.

When booting, the below message is appeared.

---------------------------------------------------------------------

NAND read: device 0 offset 0x20000, size 0x40000
ECC: uncorrectable.
ECC: uncorrectable.
ECC: uncorrectable.
" ・"
" ・"
" ・"
" ・"
ECC: uncorrectable.
ECC: uncorrectable.
ECC: uncorrectable.

NAND read from offset 20000 failed -74
262144 bytes read: ERROR

------------------------------------------------------------

Do you think that this message shows NAND device is broken? Or peripheral setting is something wrong?

Please advise me.

Best regards,

Michi 

Michi-san,

Michi Yama said:

When booting, the below message is appeared.

What is your boot-up source (MMC/SD card, NAND flash, or other)? Can you provide me the full boot-up log (console message output)?

BR
Pavel

Dear Pavel-san,

Thank you for your support.

I would like to hold my question regarding NAND flash. Instead of, I have other question.

Please see the below.

This is a part of log file of AM3874/DM8148 booting.

As you see from the above list, there is different behaviour between of DM8148 and AM3874. In DM8148 log, IVDH0 (HDVICP2 module)  process is going well, and this system boot up without no problem. But in AM3874 log, IVDH0 process is not going well,  this system can not boot up. The difference of both system is only device!

DM8148 system is used DM8148ES device. AM3874 system is used AM3874 production device. I think HDVICP2 module is not inculded in AM3874 or its module is disabled. But it seems that some data is returuned from AM3874. But its returned data is not same as DM8148ES device.

Is HDVICP2 module of AM3874 really disabled?

Please let me know.

I appreciate your quick reply.

Best regards,

Michi

Michi,

Could you open a new E2E thread. From what I can see, this is not related to the initial MMC default status issue.

BR
Pavel

Dear Pavel-san,

Thank you for your quick reply.

I opened new thread for my new question. Please see the below.

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/327360.aspx

I appreciate your support.

Best regards,

Michi