• State Resolved
  • Locked Locked
  • Replies 11 replies
  • Subscribers 99 subscribers
  • Views 3094 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Help with Developing a SYS/BIOS application for CPU2 of the TMS320F28377D processor

Daniel Block
Intellectual 380 points
Other Parts Discussed in Thread: CONTROLSUITE

I am looking for some advise (or even better an example) for using SYS/BIOS with CPU2 of the F28377D chip.  I have successfully taken the TI resourse explorer Task SYS/BIOS example for the F28377D and merged it with example code from Controlsuite to create a SYS/BIOS application that works on CPU1 and can control peripherals with the controlsuite header file code.  So I can blink the GPIO31 LED on the F28377D control card and I can call the IPCBootCPU2 function to tell CPU2 to wake up and run its code.  My issue is running a SYS/BIOS application on CPU2.  If I flash the ControlSuite example "blinky_dc_cpu02 to CPU2 and then when I power on the control card CPU1 is able to boot CPU2 and CPU2 starts running and blinking the GPIO34 LED.  If I flash a SYS/BIOS application that is very similar to the CPU1 application, but instead blinks GPIO34, does not call IPCBootCPU2 and I have defined CPU2 in the buid settings, CPU2 will not boot.  In fact it seems to cause CPU1 to restart constantly.  I am pretty sure CPU1 is restarting because in main() before I call IPCBootCPU2() I blink on and off GPIO31 LED five times with a delay inbetween.  When I have my SYS/BIOS application flashed on CPU2, CPU1 never gets passed IPCBootCPU2 and GPIO31 keeps on blinking when it should have only blinked 5 times.

Any help would be greatly appreciated. 

 

Dan

 

 

   

  • 0
    TI__Mastermind 21645 points

    Hi Dan,

    If I understand the problem correctly, you are seeing that SYS/BIOS on CPU1 is unable to boot CPU2 if you load a SYS/BIOS app on CPU2, but if you load a regular non-BIOS example on CPU2, SYS/BIOS on CPU1 is able to sucessfully boot CPU2 ?

    I wonder if SYS/BIOS CPU2 app is somehow overwriting CPU1 SYS/BIOS app contents. Can you check the map file to make sure they do not have overlapping load addresses ?

    Best,

    Ashish

  • 0 in reply to Ashish Kapania
    Intellectual 380 points

    Thanks for you quick reply and suggestion.  I looked through the map files of both my two SYS/BIOS applications (one for CPU1 and one for CPU2) and the blinky_dc_cpu1 and blinky_dc_cpu2 (controlsuite examples.)  I did find a few issues with the .cmd file F28377D.cmd that is part of the TI Resource Explorer example project.  Unfortunately changing these issues still did not fix my problem. 

    The issues I changed: 

    1.  According to 2837x_FLASH_lnk_cpu1.cmd from controlsuite the first 0x120 of RAMM0 is used for BOOT rom stack.  For CPU2 it is the first 0x7E for the boot room stack.

    So I changed both of my cmd files for my two SYS/BIOS applications to not use RAMM0 at all. 

    2.  The ram sections CPU2TOCPU1RAM and CPU1TOCPU2RAM have to be used properly for CPU1 and CPU2

    For CPU1 my cmd file needs to read

    GROUP : > CPU1TOCPU2RAM, PAGE = 1

    {

       PUTBUFFER

       PUTWRITEIDX

       GETREADIDX

    }

    GROUP: > CPU2TOCPU1RAM, PAGE = 1

    {  

        GETBUFFER : TYPE = DSECT

        GETWRITEIDX :  TYPE = DSECT

        PUTREADIDX  :  TYPE = DSECT

    }

     

    For CPU2 you must swap the CPU?TOCPU?RAM defines as so:

    GROUP : > CPU2TOCPU1RAM, PAGE = 1

    {

       PUTBUFFER

       PUTWRITEIDX

       GETREADIDX

    }

    GROUP: > CPU1TOCPU2RAM, PAGE = 1

    {  

        GETBUFFER : TYPE = DSECT

        GETWRITEIDX :  TYPE = DSECT

        PUTREADIDX  :  TYPE = DSECT

    }

    These two issues I found will probably help me out in future development, but they did not fix my current problem.  What other memory regions could CPU2 have the same load addresses as CPU1?  I know they share RAMGS0-GS15 but I have removed those memory sections from my CMD files to make sure I am not using that RAM. 

    Are there other SYS/BIOS settings, for example in the BOOT section, that need to be or should not be set for CPU2?  How about in the HWI section? 

     

    Thanks

    Dan

     

  • 0 in reply to Daniel Block
    Intellectual 380 points

    I believe I have found the issue with my problem.  In my SYS/BIOS configuration I had to uncheck "Configure Flash controller wait states" and I unchecked "Configure PLL and CPU clock dividers."  Once I do that for my CPU2 SYS/BIOS application it runs and no longer cause CPU1 (and therefore CPU2) to reset.  I am assuming that the SYS/BIOS code is setting some regesters that CPU2 does not have acess to and the causing the NMI to occur and the CPU1's NMIWD timer is timing out and causing the reset. To test if this was my issue, I did recheck Configure Flash controller wait states and my problem returned. 

    TI SYS/BIOS developers may want to look into this or at least indicate that this options should not be checked for CPU2. 

    I am still initializing the Flash on CPU2 but I am doing it myself by calling the ControlSuite function "Init_Flash" in

    main(void)     

     

  • 0 in reply to Daniel Block
    TI__Mastermind 21645 points

    Hi Daniel,

    Can you share your project ? We can try it out on our end and try to figure out if some invalid registers are being written.

    Best,

    Ashish

  • 0 in reply to Ashish Kapania
    Intellectual 380 points

    Sure here are the two projects.  One for CPU1 and one for CPU2.  Tell me if I can help further. 

    Dan

    0458.cpu01.zip6521.cpu02.zip

  • 0 in reply to Daniel Block
    Intellectual 380 points

    I was showing someone my F28377 code today and realized that I had changed a few of the default header files included with controlsuite for the two above projects.  I thought I would attach them to make it easier to Build my projects. 

    Dan

    2251.otherfilesImodified.zip

  • 0 in reply to Daniel Block
    Prodigy 160 points

    Dear Dan,

    i tried to import your Project ( CPU 1 ), But it is given problem

    BIOS.cpuFreq (200000000 Hz) does not match the actual CPU frequency (5000000 Hz). Please program the Boot module's PLL settings to ensure the actual CPU frequency matches BIOS.cpuFreq. blink_cpu01.cfg /blink_cpu01 ti.catalog.c2800.initF2837x.Boot XDCTools Configuration Marker

    I removed it by setting the PLL parameters in Boot menu of Sys Bios as

    Input Clock =  10

    PLL Multiplier =  40

    Sys Clock Div = 1

    The code Compiles , Flashes but does not Goes to main() neither Run. Can you Help

  • 0 in reply to Usman Rahim
    Prodigy 160 points

    The above problem was solved but now code is stuck in this line of code

  • 0 in reply to Usman Rahim
    Intellectual 380 points
    How did you solve the first problem? If you are working with the F28377 Control Card the crystal is 20MHz. So the settings should be
    Input Clock = 20

    PLL Multiplier = 19

    Sys Clock Div = 1

    Are you using the latest CCS?

    Dan
  • 0 in reply to Daniel Block
    Intellectual 380 points
    Oops. I just looked at my BIOS settings and the settings are
    Input Clock = 20

    PLL Multiplier = 20

    Sys Clock Div = 1
  • 0 in reply to Daniel Block
    Prodigy 160 points
    Im using the Control Card,So what should be the Sys PLL functions parameter in F28377D_sysctrl.c

    currently it is

    InitSysPll(XTAL_OSC,IMULT_20,FMULT_1,PLLCLK_BY_2); //PLLSYSCLK = 10Mhz(OSCCLK) * 40 (IMULT) * 1 (FMULT) / 2 (PLLCLK_BY_2)

    where

    XTAL_OSC = 1
    IMULT = 20
    PLLCLK = 1