DMTimer1 don't work at app

Tobias Haerter

Hello

I have used the DMTimer1 as 1ms timer.

At the emulator it work, but if I compile a release version and try to boot at the Beaglebone Black it don't start.

My code is:

void init_timer1_1ms(void)
{
unsigned int regVal

    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK) &= ~(CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL); // reset the clock

    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK)
           & CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL) != 0x0); // wait for clock reset
 
    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK) = CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL5; // set to external 32KHz clock
    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK)

    HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL) |=
                                  CM_WKUP_TIMER1_CLKCTRL_MODULEMODE_ENABLE; // enable Timer1 module
  
    while((HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL)
            & CM_WKUP_TIMER1_CLKCTRL_MODULEMODE)
                                   != CM_WKUP_TIMER1_CLKCTRL_MODULEMODE_ENABLE); // wait for enabling

    ConsoleUtilsPrintf("**** step 7 *****\n");
    ConsoleUtilsPrintf("SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL: %d\n", (HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL)));
    count = 0xFFFFFFFF;

    while((HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL)
           & CM_WKUP_TIMER1_CLKCTRL_IDLEST)
                                   != CM_WKUP_TIMER1_CLKCTRL_IDLEST_FUNC);  // wait for timer coming to its fully functionality

    // init interrupt
    IntSystemEnable(SYS_INT_TINT1_1MS);
    IntPrioritySet(SYS_INT_TINT1_1MS, 0, AINTC_HOSTINT_ROUTE_IRQ);
    IntRegister(SYS_INT_TINT1_1MS, ISR_timer1_1ms);

    //int tick variable
    ms_time_tick = 0;

    // init timer mode and registers
    // from spruh73i.pdf Datasheet page 4129
    // for 1 ms tick with a 32768-Hz clock:
    // TPIR = 232000
    // TNIR = -768000
    // TLDR = 0xFFFFFFE0
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TPIR) = 0x00038A40; //232000;
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TNIR) = 0xFFF44800; //-768000;
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TLDR) = 0xFFFFFFE0;

    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TIER) |= (DMTIMER_1MS_TIER_OVF_IT_ENA
                                                      & (DMTIMER_1MS_TIER_OVF_IT_ENA_ENB_OVF << DMTIMER_1MS_TIER_OVF_IT_ENA_SHIFT));   // Enable interrupt at timer level

    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TCRR) = 0xFFFFFFE0; //set start value of timer

    regVal = HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TCLR);
    regVal |= DMTIMER_1MS_TCLR_AR & (DMTIMER_1MS_TCLR_AR_AUTO_REL << DMTIMER_1MS_TCLR_AR_SHIFT); //set auto reload
    regVal |= DMTIMER_1MS_TCLR_ST & (DMTIMER_1MS_TCLR_ST_CNT_START << DMTIMER_1MS_TCLR_ST_SHIFT); // start timer
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TCLR)  = regVal; // start timer
}

My code stops at ConsoleUtilsPrintf

I get 0x30002 for the value of the CM_WKUP_TIMER1_CLKCTRL register.

Why do that work at the emulator and not at a real app.

regards Tobias

over 11 years ago

0 Tobias Haerter over 11 years ago

Intellectual 660 points

Hello

I have now look deeper into my sources and I had make many debugs with the console. I have found that at the emulator the register CM_WKUP_CLKSTCTRL is set to 0x3E16 and at my app the register is set to 0x1F16.

That means the CLKACTIVIT_TIMER1_GCLK is not set at the app.

I don't know why? How could I enable this Clock?

regards Tobias

0 Vineeth Balan over 11 years ago in reply to Tobias Haerter

TI__Intellectual 1640 points

Hi Tobias,

If you refer the AM335x TRM

CM_WKUP_CLKSTCTRL Register (offset = 0h) - is a part of the clock module wake up register set. Hence with reference to Section 2.1 ARM Cortex A8 Memory Map and Table 2-2. L4_WKUP Peripheral Memory Map, you will find that CM_WKUP register set starts at 0x44E00400 and ends at 0x44E004FF and this particular register is at offset 0.

hence address of this register is

( CM_WKUP_BASE_ADDRESS + REGISTER_OFFSET ) = (0x44E00400 + CM_WKUP_CLKSTCTRL_OFFSET )

= (0x44E00400 + 0x0)

Thus address of CM_WKUP_CLKSTCTRL = 0x44E00400 .

Please refer section 8.1.2.2 CM_WKUP Registers of the TRM (version SPRUH73C) for the config values.

0 Tobias Haerter over 11 years ago in reply to Vineeth Balan

Intellectual 660 points

Hello

all right.

I don't find the chaper 8.1.2.2 but I look to 8.1.12.2 CM_WKUP Registers.

If I start with SD Card and bootloader I get the register values

CM_WKUP_CLKSTCTRL 0x1F16

CM_WKUP_CM_L4_WKUP_AON_CLKSTCTRL 0x6

CM_WKUP_TIMER1_CLKCTRL 0x30002

and if I start with emulator I get the values

CM_WKUP_CLKSTCTRL 0x1E16

CM_WKUP_CM_L4_WKUP_AON_CLKSTCTRL 0x6

CM_WKUP_TIMER1_CLKCTRL 0x00002

And now, why do I have there some differences.

I'm not sure that my problems is caused by this registers.

The problem is that the timer 1 don't run if I boot with bootloader

regards Tobias

0 Tobias Haerter over 11 years ago in reply to Tobias Haerter

Intellectual 660 points

Hello

If I try to start with a bootloader my code stick at

while((HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL)

           & CM_WKUP_TIMER1_CLKCTRL_IDLEST)

                                   != CM_WKUP_TIMER1_CLKCTRL_IDLEST_FUNC); // wait for timer coming to its fully functionality

the emulator starts the timer

Thanks for your help Tobias

0 Vineeth Balan over 11 years ago in reply to Tobias Haerter

TI__Intellectual 1640 points

Hi Tobias,

There seems to be an issue with clocking . Please check the domain clock is turned on or not ( CM_WKUP_CONTROL_CLKCTRL value.)

0 Tobias Haerter over 11 years ago in reply to Vineeth Balan

Intellectual 660 points

Hello

the CM_WKUP_CONTROL_CLKCTRL register is set to 0x2 at bootloader and emulator start.

Tobias

0 Vineeth Balan over 11 years ago in reply to Tobias Haerter

TI__Intellectual 1640 points

Hi Tobias,

Could you please go through the clock initialization code in ..\platform\beaglebone\dmtimer.c.

That should give you some hint whats going wrong. please do expect some differences as timer1 does not belong to peripheral domain.

0 Tobias Haerter over 11 years ago in reply to Vineeth Balan

Intellectual 660 points

Hello

I have done that and I have also checked /demo/demoTimer.c

And my configuration work with the emulator.

regards Tobias

0 Tobias Haerter over 11 years ago in reply to Tobias Haerter

Intellectual 660 points

Hello

could it be that I have a problem with the system_mode and I may not allowed to write in to the register?

Tobias

0 Tobias Haerter over 11 years ago in reply to Tobias Haerter

Intellectual 660 points

Hello

I have now done some test with CPUSwitchToPrivilegedMode and CPUSwitchToUserMode and I have also read the CPSR Register it stays at 0x6000019F after I switch to PrivilegedMode. That means I'm at the right mode.

But my timer don't start.

Tobias

0 Tobias Haerter over 11 years ago in reply to Tobias Haerter

Intellectual 660 points

Hello,

now I have testet the precompiled demo app with precompiled MLO and thy also don't work.

I don't get the text "After intializing timer" on the console. I only get "CM3 Firmware Version: 385"

I'm using a BeagleboneBlack.

Do you have any suggestion where I can search for this timer-error

regards Tobias.

0 Tobias Haerter over 11 years ago in reply to Tobias Haerter

Intellectual 660 points

Hello

now my demo app runs on my BBB

see http://e2e.ti.com/support/embedded/starterware/f/790/t/325722.aspx

But the problem with the timer still exists.

I have found the following.

The Timer don't start if I use the external 32kHz clock. If I use the internal 32KHz RC the app runs.

I guess the Beaglebone Black have a problem with the external 32KHz clock. I have also used another BeagleBone Black A5C and there is the same problem.

How could I proceed to get the timer running with the external 32kHz clock?

regards Tobias

0 Tobias Haerter over 11 years ago in reply to Tobias Haerter

Intellectual 660 points

Hello

I have solved the problem by my own.

The problem is that the inputs of the external oscillator are driven to high impedance from the RTC.

Now my working code for all the others:

void init_timer1_1ms(void)
{
unsigned int regVal;

    // init External 32k Clock
    RTCWriteProtectDisable(SOC_RTC_0_REGS); // enable access to RTC registers
    RTCOscillatorStateControl(SOC_RTC_0_REGS, RTC_32KOSC_ENABLE); // enable the External Oscillator
    // if this is not done the Oscillator outputs would be driven to High Impedance by Reset
    RTCWriteProtectEnable(SOC_RTC_0_REGS); // disable access to RTC registers

    // init clock
    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK) &=
                                         ~(CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL); // reset the clock

    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK)
           & CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL) != 0x0); // wait for clock reset

    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK) = CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL5; // set to external 32KHz clock
    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK)
           & CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL) != CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL5); // wait for setting
//    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK) = CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL4; // set to internal 32KHz clock
//    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK)
//           & CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL) != CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL4); // wait for setting
//    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK) = CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL2; // set to PLL clock
//    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER1MS_CLK)
//           & CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL) != CM_DPLL_CLKSEL_TIMER1MS_CLK_CLKSEL_SEL2); // wait for setting

    HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL) |=
                                  CM_WKUP_TIMER1_CLKCTRL_MODULEMODE_ENABLE; // enable Timer1 module
    while((HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL)
            & CM_WKUP_TIMER1_CLKCTRL_MODULEMODE)
                                   != CM_WKUP_TIMER1_CLKCTRL_MODULEMODE_ENABLE); // wait for enabling

    while((HWREG(SOC_CM_WKUP_REGS + CM_WKUP_TIMER1_CLKCTRL)
           & CM_WKUP_TIMER1_CLKCTRL_IDLEST)
                                   != CM_WKUP_TIMER1_CLKCTRL_IDLEST_FUNC)
    {
  //      ConsoleUtilsPrintf("* boot timer wait for CM_WKUP_TIMER1_CLKCTRL_IDLEST\n");
    } // wait for timer coming to its fully functionality

    // init interrupt
    IntSystemEnable(SYS_INT_TINT1_1MS);
    IntPrioritySet(SYS_INT_TINT1_1MS, 0, AINTC_HOSTINT_ROUTE_IRQ);
    IntRegister(SYS_INT_TINT1_1MS, ISR_timer1_1ms);

    //int tick variable
    ms_time_tick = 0;

    // init timer mode and registers
    // from spruh73i.pdf Datasheet page 4129
    // for 1 ms tick with a 32768-Hz clock:
    // TPIR = 232000
    // TNIR = -768000
    // TLDR = 0xFFFFFFE0
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TPIR) = 0x00038A40; //232000;
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TNIR) = 0xFFF44800; //-768000;
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TLDR) = 0xFFFFFFE0;

    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TIER) |= (DMTIMER_1MS_TIER_OVF_IT_ENA
                                                      & (DMTIMER_1MS_TIER_OVF_IT_ENA_ENB_OVF << DMTIMER_1MS_TIER_OVF_IT_ENA_SHIFT));   // Enable interrupt at timer level

    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TCRR) = 0xFFFFFFE0; //set start value of timer

    regVal = HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TCLR);
//    regVal |= DMTIMER_1MS_TCLR_PRE & (DMTIMER_1MS_TCLR_PRE_PRESCAL_ON << DMTIMER_1MS_TCLR_PRE_SHIFT); // enable Prescaler with Divisor 2
    regVal |= DMTIMER_1MS_TCLR_AR & (DMTIMER_1MS_TCLR_AR_AUTO_REL << DMTIMER_1MS_TCLR_AR_SHIFT); //set auto reload
    regVal |= DMTIMER_1MS_TCLR_ST & (DMTIMER_1MS_TCLR_ST_CNT_START << DMTIMER_1MS_TCLR_ST_SHIFT); // start timer
    HWREG(SOC_DMTIMER_1_REGS + DMTIMER_1MS_TCLR)  = regVal; // start timer
}

Tobias

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DMTimer1 don't work at app