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Am335x RTC 1s periodic interrupt delay

Harsha Kiran
Intellectual 545 points

Hi !

I am working on the AM335x processor and the 1 sec events generated out of RTC.

I modified the code of the rtc-omap.c in the kernel to generate the events out of the chip. My application threads run every second based on the 1sec interrupts. I am measuring a delay from the time the event is generated to the time its read back. Its the same case with the 1sec interrupts from the kernel.

Please find below the time stamps after the 1sec events are generated from the kernel timers..(https://www.kernel.org/doc/Documentation/rtc.txt).. i observe the same delays in the interrupts from the chip.

I read the TRM and it explains that the event is generated at every second change. I would like to know if there is any delay involved in it?? or is it really precise?? i wanted the event to be exactly at the second change

psec=54
csec=55
1394192515.686130880
1394192516.686069360
1394192517.686051120
1394192518.686042600
1394192519.686071520
1394192520.686049480
1394192521.686045960
1394192522.686158000
1394192523.685998160
1394192524.686058720
1394192525.686045760
1394192526.686043560

Thanks and Regards,

Harsha Kiran

  • 0
    TI__Guru**** 393215 points
    Have you turned on the external oscillator? By default RTC runs off the internal RC oscillator, which is quite unprecise.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 545 points

    Hi Biser .

    Thank you for the reply. Yes the External Oscillator is enabled. i added this into the internal RTC driver(rtc-omap.c)

    (inside the omap-rtc.c)

    /* Selecting the clock source into the RTC-----
    *
    */

    reg=rtc_read(OMAP_RTC_OSC_REG);
    new_ctrl = reg & (OMAP_RTC_OSC_EN |OMAP_RTC_OSC_CLK);

    if (reg != new_ctrl)
    rtc_write(new_ctrl, OMAP_RTC_OSC_REG);

    and its also done in the MLO section

    static void rtc32k_enable(void)
    {
    struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;

    /*
    * Unlock the RTC's registers. For more details please see the
    * RTC_SS section of the TRM. In order to unlock we need to
    * write these specific values (keys) in this order.
    */
    writel(0x83e70b13, &rtc->kick0r);
    writel(0x95a4f1e0, &rtc->kick1r);

    /* Enable the RTC 32K OSC by setting bits 3 and 6. */
    writel((1 << 3) | (1 << 6), &rtc->osc);

    /*Added for Internal RTC to run from the boot up */
    /* Setting for the RTC Control Registers */
    writel((1 << 0) , &rtc->rtc_cntrl);
    }

    Thanks,

    harsha