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C6678, what is the QMSS clock rate?

Other Parts Discussed in Thread: TMS320C6678

In the QMSS user guide (sprugr9f), in section 4.3.1.2 Global Timer Command Interface, it makes reference to the QMSS subsystem clock rate. What is the QM subsystem clock rate? Where is this documented?

The value of Timer Constant is the number of queue manager sub-system clocks

divided by 2 that comprise a single tick in the accumulator firmware.

For example, if the sub-system clock is 350 MHz (the default), and the desired firmware

tick is 20 μs, the proper timer constant for this command is calculated as follows:

  • Brad Caldwell,

    Yes, for example the time is specified in usec, then converted to the hardware expect value assuming a 350 MHz QMSS sub-system clock.
    Here you can find clock related at the data manual TMS320C6678
    The below thread is similar for QMSS clock, please see this will help you.
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/207124.aspx

  • Ok thanks. I'll assume it's CPU/3 then. I guess I was expecting to see it described in the clocking section of the datasheet not not in the Teranet diagrams.