I am trying to setup CM_FCLKEN_PER and CM_ICLKEN_PER so that I can use GPIO2-6. For some reason I can set all the bits for CM_FCLKEN_PER but not CM_ICLKEN_PER. I feel like some thing needs to wake up but I cannot figure it out from the DM3730 TRM. My code is below. If I were to remove the while loops my program crashes with a bus error while setting up the padconf for GPIO6. Has anyone run into this problem before? Thanks!
#define HWREG(x) (*((volatile unsigned int *)(x)))
const unsigned int PER_CM = 0x48005000;
const unsigned int PER_CM_SIZE = 0x2000;
const unsigned int CM_FCLKEN_PER = 0x0;
const unsigned int CM_ICLKEN_PER = 0x10;
const unsigned int CM_AUTOIDLE_PER = 0x30;
const unsigned int EN_GPIO6 = (1 << 17);
const unsigned int EN_GPIO5 = (1 << 16);
const unsigned int EN_GPIO4 = (1 << 15);
const unsigned int EN_GPIO3 = (1 << 14);
const unsigned int EN_GPIO2 = (1 << 13);
const unsigned int AUTO_GPIO6 = (1 << 17);
const unsigned int AUTO_GPIO5 = (1 << 16);
const unsigned int AUTO_GPIO4 = (1 << 15);
const unsigned int AUTO_GPIO3 = (1 << 14);
const unsigned int AUTO_GPIO2 = (1 << 13);
int mMemory = open( "/dev/mem", O_RDWR | O_SYNC );
unsigned int* PerCm = (unsigned int *)mmap( NULL, PER_CM_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, mMemory, PER_CM);
while( !(HWREG(PerCm + CM_FCLKEN_PER) & (EN_GPIO6 | EN_GPIO5 | EN_GPIO4 | EN_GPIO3 | EN_GPIO2)) )
HWREG(PerCm + CM_FCLKEN_PER) |= (EN_GPIO6 | EN_GPIO5 | EN_GPIO4 | EN_GPIO3 | EN_GPIO2);
while( !(HWREG(PerCm + CM_ICLKEN_PER) & (EN_GPIO6 | EN_GPIO5 | EN_GPIO4 | EN_GPIO3 | EN_GPIO2)) )
HWREG(PerCm + CM_ICLKEN_PER) |= (EN_GPIO6 | EN_GPIO5 | EN_GPIO4 | EN_GPIO3 | EN_GPIO2);
HWREG(PerCm + CM_AUTOIDLE_PER) &= ~(AUTO_GPIO6 | AUTO_GPIO5 | AUTO_GPIO4 | AUTO_GPIO3 | AUTO_GPIO2 );
int Result = munmap(PerCm, PER_CM_SIZE);
