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Have two different ISR for same GPIO input?

Genius 5820 points
Other Parts Discussed in Thread: AM3358

Hi,

I afraid the answer is no but just to avoid I have overseen something:

Assumed I want to get an interrupt whenever the input GPIO0[17] changes. There I can define an interrupt on GPIO_INT_TYPE_BOTH_LEVEL, means it happens when HIGH or LOW is detected on that input pin.

My question: is it possible to call two different ISRs for same input pin depending if the level goes to HIGH or LOW? Means GPIO_INT_TYPE_LEVEL_LOW calls one ISR and GPIO_INT_TYPE_LEVEL_HIGH an other one?

Thanks!

  • Hi Hans,
     
    You could branch inside the ISR depending on pin state. Or, given that there are two interrupts available per GPIO module you could use one interrupt for rising edges and the other for falling edges.
  • Opps, really mortifying, I forgot to give some basic details:

    Biser Gatchev-XID said:
    given that there are two interrupts available per GPIO module

    That's my question, is there a possibility with AM3358 to have two such interrupts? As far as I understood the TRM until now I can have only one per GPIO module...

  • Yes, see Table 6-1 in the TRM, for example INT 96 and 97 are for GPIO0 and so on - 2 interrupts per GPIO module.
  • OK, that's clear but I have only one register GPIO_RISINGDETECT where I can enable interrupt for rising edge - but how can I assign this to one of both interrupts? There is no second register of this kind that would give the possibility to use the other interrupt line.

    So setting a bit in GPIO_RISINGDETECT seems to enable any interrupt but not a specific one...

  • Looking more carefully in the TRM I agree, there is no mechanism for routing different edges to separate IRQs. This is only possible for level detection.
  • Sure this works for level detection? The 0 and 1 in GPIO_LEVELDETECT0 and GPIO_LEVELDETECT1 register correspond to the LOW and HIGH level, not to the interrupt line.

    Meanwhile I'm asking myself why there are two interrupt lines when they can't be really used...

    Cheers

    Hans

  • From TRM section 25.3.3.1:
     
    In order to generate an interrupt request to a host processor upon a defined event (level or logic transition) occurring on a GPIO pin, the GPIO configuration registers have to be programmed as follows:
     
    • Interrupts for the GPIO channel must be enabled in the GPIO_IRQSTATUS_SET_0 and/or GPIO_IRQSTATUS_SET_1 registers.
     
    • The expected event(s) on input GPIO to trigger the interrupt request has to be selected in the GPIO_LEVELDETECT0, GPIO_LEVELDETECT1, GPIO_RISINGDETECT, and GPIO_FALLINGDETECT registers.
     
    For instance, interrupt generation on both edges on input k is configured by setting to 1 the kth bit in registers GPIO_RISINGDETECT and GPIO_FALLINGDETECT along with the interrupt enabling for one or both interrupt lines (GPIO_IRQSTATUS_SET_n).
  • Biser Gatchev-XID said:
    Interrupts for the GPIO channel must be enabled in the GPIO_IRQSTATUS_SET_0 and/or GPIO_IRQSTATUS_SET_1 registers.

    OK, this specifies if interrupt line 0 or 1 has to be used.

    Biser Gatchev-XID said:
    The expected event(s) on input GPIO to trigger the interrupt request has to be selected in the GPIO_LEVELDETECT0, GPIO_LEVELDETECT1, GPIO_RISINGDETECT, and GPIO_FALLINGDETECT registers.

    This specifies if an interrupt has to happen on LOW, level, HIGH level, rising edge or falling edge but does not give the possibility to assign one of the events to a specific interrupt line.

    So for me also this part of manual does not describe why there are two interrupt lines when they can't be used for different events.

  • This is just my opinion.  I think you should just get an unused GPIO, try and setup each type of interrupt and see which one has better reliability and response time for your application. 

    I'm guessing for simplicity, you'll end up with 1 ISR, which flips the edge type after each call.