c6678 SRIO PRIVID

Gabriele_Giannini

I'm reading KeyStone Architecture Serial Rapid IO (SRIO) User Guide (SPRUGW1B)

I cannot understand the purpose of the PRIVID and how to use it.

For example in the LSU_REG6 (WO) in the description of the section PrivId it's written that "When attempting to manually release the busy bit, the PrivID of the original locking CPU has to match the PrivID that is being used for release the busy bit being used for release the busy bit."

But what does it mean?

This field is handled automatically when a core accesses to the register or I have to write the privid that I'm using? And in this case how can I find out?

over 12 years ago

0 Ganapathi Dhandapani95 over 12 years ago

TI__Mastermind 28085 points

Hi Gabriele,

Hardware will release the busy bit. It will set the CC(Completion Code) bits to “111”. This specific shadow register writes are now complete.

if you try manually release the busy bit, the PrivID of the original locking CPU has to match the PrivID that is
being used for release the busy bit being used for release the busy bit.

CPU can try to write to a shadow register it has to check for availability of shadow registers. The CPU has to do a read of LSU_REG6 to check the status of FULL bit.
If the FULL bit is a ‘1’, that implies that there are no more shadow registers available. If the FULL bit is a ‘0’, it implies that there is at least one shadow register available.

if you need more information please refer section "2.3.2.0.1 Full Bit" in SRIO user guide.

Refer below thread link, it should be help full for you

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/439/p/158284/600974.aspx#600974

0 Gabriele_Giannini over 12 years ago in reply to Ganapathi Dhandapani95

Intellectual 925 points

My question was different...

I've understanded the purpose of the LSU register and how to correct the Hang condition...

But my question was about the PRIVID.
i still don't know how to obtain it, so in case of need i cannot write it in the register

Where can i find the PRIVID of the various core and peripherals?

0 Ganapathi Dhandapani95 over 12 years ago in reply to Gabriele_Giannini

TI__Mastermind 28085 points

Hi Gabriele,

There is no way to read the PrivID of the master that programmed/locked the LSU. Handling of such an error case has to be predetermined/managed in software.

The PRIVID mapping to individual master is found in the data manual. For example: http://www.ti.com/lit/ds/symlink/tms320c6678.pdf table 7-51.

Thanks,

Processors

Processors forum

c6678 SRIO PRIVID