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Packet Accelerator LUT Management

Anil Arslan
Prodigy 160 points


Hi TI Folks

I have been working on Packet Accelerator and have a few question about LUT management.

  • Is there any registers which i could use to reach look up table? Could i control an entry is written or not, wihout using LLD?
  • How could i know a config (cmd packet which is pushed to PDSP dedicated queue) is wrong?
  • When an entry is deleted from LUT2, all linked entries which is located at LUT1 is deleted too or is the link just broken? 
  • 0
    TI__Mastermind 20790 points

    Anil,

    Please see the PA User guide to find the available registers for LUT2.

    How are you trying to delete the entry from LUT2?
    Did you try with Pa_delHandle?
    I think so, the entry from LUT1 should not remove when you delete the entry from LUT2.

    • One 8192-entry LUT2 (connected to PDSP3) for Layer 4/5 or custom LUT2 lookup
    • PDSP3 does all TCP/UDP and Custom LUT2 lookup using LUT2

    I hope, you know the PA APIs, can find the list of PA APIs at the pdk
    pdk_C6678_1_1_2_6\packages\ti\drv\pa\docs\doxygen\html\group__palld__api__functions.html

  • 0 in reply to Pubesh
    Prodigy 160 points

    Hi Pubesh

    Thanks for help. I just curious about it, i did not try to delete any entries. 

    However i did not completely understand the linking of entries. For example, when i add an IP to LUT1, do i have to link it with a MAC entry? Is it meaningful for PA Engines or just a method to store LUT information at RAM using LLD? For a from-network packet, it matches MAC with the LUT1 entry at L2 Engine and continues parsing at L3 Engine. If MAC entry and IP entry are not linked, is the packet dropped or match with IP although they are not linked at?

    It is really important for my design.

    Anil

  • 0 in reply to Anil Arslan
    TI__Mastermind 20790 points

    Anil,

    Yes, the PA L2 classify engine matches the MAC addresses and Ethertype based on the entries in the L2 classify engine lookup table. For example, a UDP address in the L4 classify engine can be linked to an IP address in the L3 classify engine, which can then be linked to a MAC address in the L2 classify engine.
    Find the more details at the section "2.8 Adding Entries to the Classification Engines" in the KeyStone Architecture Packet Accelerator (PA) User Guide.