AM3358 GPMC bus, and peripherals

sir,

actually if you see the pin discreption of the ZCZ package, you will find that the LCD dedicated pins are multiplexed with the GPMC bus. 

There are all the other things in my board that are necessary for the board to work.

Major thing to look at is " the common bus i.e. GPMC bus which is used to connect the Boot flash, for booting purpose, and also the gpmc bus acts as a link that communicates between the FPGA and Arm processor."

Looking at the pin multiplexing, I am finding it hard to find free gpio pins on the board, if all the other peripherals are connected to it.

Regards 

sir, also to bring to your notice, I am using the same LCD RGMII configuration, as well as the same configuration for sd card, as provided in the sitara starter kit.

Regards

Sir, 

I am connecting a nor flash with the GPMC bus with a size of 32 MB. Also a chip named CSSP which does the job of transfering the video input to it via an other peripheral on the board.. I actually want to place that information on to the GPMC bus so that the video information from the CSSP will be accessible to both (Processor and the FPGA).

Hence it will be really helpful if you can help me solve this problem of mine.

Best Regards

Parth Bapaye

Parth Bapaye said:

I actually want to place that information on to the GPMC bus so that the video information from the CSSP will be accessible to both (Processor and the FPGA).

This will not be possible. The AM335X is GPMC master. No other masters are possible. To transfer data between CSSP and FPGA it will have to be read by the processor and then sent to the FPGA. Please read the AM335X documentation (datasheet, technical reference manual and errata) to understand how the processor peripherals work.

Hi,

Below are the design requirements:

GPMC interface is connected to AM5728 (Earlier OMAP5 and now in Sitara family of TI) processor and Kintex 7 FPGA for data communication.

can i use connect GPMC interface to dedicate pins of FPGA for configuration (Slave select MAP) purpose.

Please let me know is it possible to use GPMC for configuration purpose initially and then same lines are used for data communication (After configuration FPGA pins can be used as IOs)

Regards,

Mani

Hi Mani,

Please ask your nearest TI representative about AM57X availability/documentation.

Hello Biser,

Thanks for your reply.

Can you please let me know in general, GPMC bus of processor be used for configuration of FPGA.

Regards,

Mani

This should depend on the FPGA capabilities. GPMC is normally used for interfacing to NOR/SRAM/NAND type devices.

I think best way would be use GPMC for NAND/NOR. You can store the binary of FPGA in bundle along with uboot and kernel image. Then while booting, use dedicated spi of AM335X processor to be connected to FPGA. so that FPGA will boot in slave mode.

You can boot the processor first then FPGA. For this you may need to write the kernel module for SPI flashing

Regards,

Vinayak

Hello Vinay,

Thanks for your reply.

Instead of SPI can GPMC be used for this purpose, as SPI takes more time for loading.

In any case SPI / GPMC, processor has to control configuration sequence of FPGA i.e, once INIT_B is released it should start configuration (It also has to control few other control pins)

Regards,
Mani

Hi Mani,

How you are going to boot processor and FPGA at same time? Also how FPGA will understand @ which address, there is binary located?

Vinayak

Hello Vinayak,

Processor and FPGA are not going to boot at same time.

First processor will boot from Flash connected to it and then configure FPGA. The question is: During configuration can GPMC lines be used. If so, configuration control sequence required for FPGA has to be handled by the software of the processor.?

FPGA will be in Slave BPI mode, as FPGA in slave it does not have control on which location of data to access.

Please let me know your thoughts on this..

Please contact your nearest TI representative.