• State
  • Locked Locked
  • Replies 9 replies
  • Subscribers 99 subscribers
  • Views 895 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

IOPU configuration for the secure C6748

ReinierC
Expert 2425 points


Good day Rahul,

I am currently working towards debugging a binding application (based on the examples you gave me) for the secure C6748. At the moment I am booting a simple application over UART that does nothing other than opening the JTAG interface for emulation.

When the exit mode of this simple unlock application is set to NONSECURE, it is possible to load an application via JTAG in CCS 5. However, to debug the secure binding process, I need to set the exit mode to SECUREWITHSK, since I have to access the secure kernel APIs. It is at this point that the MPU and IOPU configuration come into play. 

What I am currently seeing in CCS 5 is that the GEL file successfully executes, but instead of the play button becoming active in the debug perspective, it appears as though the application is attempting to automatically execute, i.e. the pause button immediately becomes active, as if the play button was already pressed.

I came across this related post:

http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/p/202929/720619.aspx#720619

but I still do not know what all the fields for the IOPUCONFIG means.

Can you please provide me with some more information and/or documentation on the matter? 

Thanks in advance!

  • 0
    TI__Guru* 84110 points

    Reinier,

    Does the pause button work so you can stop the application and see what it is doing?

    Is it possible you have something configured in CCS that tries to do a command like GoMain? This is common when loading an executable, but it is not clear what you are doing on CCS.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Expert 2425 points

    Hi Randy,

    It is possible to pause the execution in CCS, but it ends up in some unknown location, so I do not believe its executing at all.

    I am very confident that it has something to do with IOPU and/or MPU configuration for secure mode with the secure kernel enabled. I have confirmed this, by successfully loading the exact same program via the JTAG emulator in CCS if the boot exit mode of the previous UART boot was set to NONSECURE.

  • 0 in reply to ReinierC
    TI__Guru** 116770 points

    Hi Reinier, 

    I have sent you additional documentation on the IOPUs and how the configuration we provide will disable them during boot up even for secure exit mode in the email that you sent me. Please use the IOPU settings from the binding example that I have sent to you and let me know if this issue is resolved.

    Regards,

    Rahul 

  • 0 in reply to Rahul Prabhu
    Expert 2425 points

    Hi Rahul,

    I have tried the *.ini file provided with the SPI secure binding example as you suggested. I only commented out the PLL0, PLL1 and DDR configuration in the *.ini file, since I do this configuration in the GEL file in the CCS 5 project. By using this *.ini file it is now possible to reach the main() function and stepping through the code with the emulator. However, upon configuring the interrupts in my non-BIOS application, the application seems to bomb out, i.e. it jumps to some random address. In particular, the moment I write the vector table to the ISTP register things go wrong. This occurs in the IntDSPINTCInit() function, which I used from the Starterware kit.

    Furthermore, by only changing the boot exit mode to NONSECURE in the *.ini file and repeating this process, the application executes exactly as I expect it to.

    Any suggestions?

  • 0 in reply to ReinierC
    TI__Guru** 116770 points

    Are you currently trying to bind an image or implement some kind of runtime security. SInce Basic secure parts only support secure boot. We expect that most users would exit in NONSECURE exit mode except when they are implementing the binding process.or want to load a secure module after boot. Also can you specify where your application is loaded and what memories it could be accesssing. Can you step through to see if some interrupt was set when the code went to weed?

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Expert 2425 points

    Rahul,

    Yes, this is specifically just for debugging the secure binding process, I have not intention of exiting in SECUREWITHSK for the normal operational code.

    Although I would ultimately like to debug the secure binding application, I first attempted to load and debug a much simpler application after exiting in SECUREWITHSK mode. This was also due to the fact that the secure binding application is DSP/BIOS-based and I still have some linking errors for the secure kernel in DSP/BIOS (mentioned in another thread).

    This simple application tests the on-board mDDR RAM and therefore lives entirely in the internal RAM of the C6748. I am aware that there is a certain region of the internal RAM, which is off-limits during secure boot (0x0080 4000 to 0x0080 7FFF) and I have provided for this in the linker command file. I have attached the linker command and MAP files for some more information. 

    Fullscreen 0385.ram_tester_cmd.txt Download 
    // ============================================================================
// Linker Command File for Linking c674 DSP Programs
//
// These linker options are for command line linking only. For IDE linking,
// you should set your linker options in Project Properties.
//         -c                    Link Using C Conventions
//        -stack	0x02800        Software Stack Size (10 KBytes)
//        -heap    	0x05000        Heap Area Size (20 KBytes)
// ===========================================================================
-stack 	0x02800
-heap 	0x05000

// ============================================================================
//                         Specify the System Memory Map
// ============================================================================
MEMORY
{
    L1P:    o = 0x11E00000        l = 0x00008000
    L1D:    o = 0x11F00000        l = 0x00008000
    L2:     o = 0x11808000        l = 0x00038000
    DDR2:   o = 0xC0000000        l = 0x04000000
}

// ============================================================================
//                 Specify the Sections Allocation into Memory
// ============================================================================
SECTIONS
{
    .cinit        >        L2               // Initialization Tables
    .pinit        >        L2               // Constructor Tables
    .init_array   >        L2               //
    .binit        >        L2               // Boot Tables
    .const        >        L2               // Constant Data
    .switch       >        L2               // Jump Tables
    .text         >        L2               // Executable Code
    .text:_c_int00: align=1024 > L2         // Entrypoint
    
    GROUP (NEARDP_DATA)                       // group near data
    {
       .neardata
       .rodata
       .bss                                   // note: removed fill = 0
    }             >        L2
    .far: fill = 0x0, load > L2             // Far Global & Static Variables
    .fardata      >        L2               // Far RW Data
    .stack        >        L2               // Software System Stack
    .sysmem       >        L2               // Dynamic Memory Allocation Area
    
    .cio          >        L2               // C I/O Buffer
    .vecs         >        L2               // Interrupt Vectors
}

    Fullscreen 1256.ram_tester_map.txt Download 
    ******************************************************************************
               TMS320C6x Linker PC v7.4.2                      
******************************************************************************
>> Linked Mon Mar 10 15:28:43 2014

OUTPUT FILE NAME:   <tc4_lp_ram_tester.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 11816400


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
  L2                    11808000   00038000  0000e3f0  00029c10  RWIX
  L1P                   11e00000   00008000  00000000  00008000  RWIX
  L1D                   11f00000   00008000  00000000  00008000  RWIX
  DDR2                  c0000000   04000000  00000000  04000000  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.pinit     0    11808000    00000000     UNINITIALIZED

.text      0    11808000    00005e40     
                  11808000    00001aa0     mod-hal_lib_non_bios.lib : interrupt.obj (.text:retain)
                  11809aa0    00000880                              : uart_driver.obj (.text)
                  1180a320    00000840                              : timer_driver.obj (.text)
                  1180ab60    00000600     ram_tester.obj (.text)
                  1180b160    000005e0     mod-hal_lib_non_bios.lib : interrupt.obj (.text)
                  1180b740    00000580                              : gpio_driver.obj (.text)
                  1180bcc0    000004e0                              : rm_c6748_timer.obj (.text)
                  1180c1a0    000004c0                              : cache.obj (.text)
                  1180c660    000004c0                              : platform_tc4_lp.obj (.text)
                  1180cb20    00000340                              : hw_def_ccs2v2_non_bios.obj (.text)
                  1180ce60    00000280     rts6740.lib : memory.obj (.text:_free)
                  1180d0e0    00000180                 : memory.obj (.text:_malloc)
                  1180d260    00000160     mod-hal_lib_non_bios.lib : sys_delay.obj (.text)
                  1180d3c0    00000040     rts6740.lib : args_main.obj (.text:__args_main)
                  1180d400    00000200     mod-hal_lib_non_bios.lib : int_vecs.obj (.text)
                  1180d600    00000140                              : psc_driver.obj (.text)
                  1180d740    000000c0     rts6740.lib : autoinit.obj (.text:__auto_init)
                  1180d800    000000c0                 : divu.obj (.text:__divu)
                  1180d8c0    000000c0                 : exit.obj (.text:_exit)
                  1180d980    000000a0                 : new_.obj (.text:___nw__FUi)
                  1180da20    000000a0                 : cpy_tbl.obj (.text:_copy_in)
                  1180dac0    000000a0                 : memcpy64.obj (.text:_memcpy)
                  1180db60    000000a0                 : memory.obj (.text:_minsert)
                  1180dc00    000000a0                 : memory.obj (.text:_mremove)
                  1180dca0    00000080                 : fixdu.obj (.text:__fixdu)
                  1180dd20    00000060                 : cpp_init.obj (.text:___TI_cpp_init)
                  1180dd80    00000040     tc4_lp_ram_test_main.obj (.text)
                  1180ddc0    00000020     rts6740.lib : newhandler.obj (.text:___default_new_handler__Fv)
                  1180dde0    00000020                 : delete.obj (.text:___dl__FPv)
                  1180de00    00000020                 : _lock.obj (.text:__nop)
                  1180de20    00000020                 : exit.obj (.text:_abort)

.sysmem    0    1180de40    00005000     UNINITIALIZED
                  1180de40    00000008     rts6740.lib : memory.obj (.sysmem)
                  1180de48    00004ff8     --HOLE--

.stack     0    11812e40    00002800     UNINITIALIZED
                  11812e40    00000008     rts6740.lib : boot.obj (.stack)
                  11812e48    000027f8     --HOLE--

.far       0    11815640    00000ab8     
                  11815640    00000800     mod-hal_lib_non_bios.lib : uart_driver.obj (.far) [fill = 00000000]
                  11815e40    00000240                              : interrupt.obj (.far) [fill = 00000000]
                  11816080    00000056     ram_tester.obj (.far) [fill = 00000000]
                  118160d6    00000002     --HOLE-- [fill = 00000000]
                  118160d8    0000000c     rts6740.lib : exit.obj (.far) [fill = 00000000]
                  118160e4    00000008                 : _lock.obj (.far) [fill = 00000000]
                  118160ec    00000008                 : memory.obj (.far) [fill = 00000000]
                  118160f4    00000004                 : vars.obj (.far) [fill = 00000000]

.cinit     0    118160f8    000001fc     
                  118160f8    000000b4     ram_tester.obj (.cinit)
                  118161ac    00000004     --HOLE-- [fill = 0]
                  118161b0    00000099     mod-hal_lib_non_bios.lib : hw_def_ccs2v2_non_bios.obj (.cinit)
                  11816249    00000007     --HOLE-- [fill = 0]
                  11816250    0000002c     rts6740.lib : exit.obj (.cinit)
                  1181627c    00000004     --HOLE-- [fill = 0]
                  11816280    0000002c                 : memory.obj (.cinit)
                  118162ac    00000004     --HOLE-- [fill = 0]
                  118162b0    0000001c                 : _lock.obj (.cinit)
                  118162cc    00000004     --HOLE-- [fill = 0]
                  118162d0    0000000c     mod-hal_lib_non_bios.lib : sys_delay.obj (.cinit)
                  118162dc    00000004     --HOLE-- [fill = 0]
                  118162e0    0000000c     rts6740.lib : vars.obj (.cinit)
                  118162ec    00000004     --HOLE-- [fill = 0]
                  118162f0    00000004     (.pad.cinit) [fill = 0]

.neardata 
*          0    118162f4    00000000     UNINITIALIZED

.rodata    0    118162f4    00000000     UNINITIALIZED

.bss       0    118162f4    0000004c     UNINITIALIZED
                  118162f4    00000025     mod-hal_lib_non_bios.lib : hw_def_ccs2v2_non_bios.obj (.bss)
                  11816319    00000003     --HOLE--
                  1181631c    00000010                              : uart_driver.obj (.bss)
                  1181632c    00000010     ram_tester.obj (.bss)
                  1181633c    00000004     mod-hal_lib_non_bios.lib : sys_delay.obj (.bss)

.switch    0    11816340    00000020     
                  11816340    00000010     mod-hal_lib_non_bios.lib : gpio_driver.obj (.switch:_GPIOIntTypeSet)
                  11816350    00000010     ram_tester.obj (.switch:__main_state_machine__Q2_10ram_tester10Ram_testerFv)

.const     0    11816360    00000010     
                  11816360    00000010     ram_tester.obj (.const:___vtbl__Q2_10ram_tester10Ram_tester)

.text:_c_int00 
*          0    11816400    00000080     
                  11816400    00000080     rts6740.lib : boot.obj (.text:_c_int00)


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

address    name
--------   ----
118162f4   $bss
118162f4   .bss
11808000   .text
1180de20   C$$EXIT
1180c408   _CacheDisable
1180c520   _CacheDisableMAR
1180c328   _CacheEnable
1180c488   _CacheEnableMAR
1180c5f0   _CacheInv
1180c5b8   _CacheInvL1dAll
1180c5ac   _CacheInvL1pAll
1180c5c8   _CacheInvL2All
1180c60c   _CacheWB
1180c5d4   _CacheWBAll
1180c628   _CacheWBInv
1180c5e4   _CacheWBInvAll
1180b5b8   _ExcCombineAdd
1180b600   _ExcCombineRemove
1180b598   _ExcGlobalEnable
1180bbe4   _GPIOBankIntDisable
1180bbb4   _GPIOBankIntEnable
1180bc10   _GPIOBankPinsWrite
1180b7d8   _GPIODirModeGet
1180b740   _GPIODirModeSet
1180ba84   _GPIOIntTypeGet
1180b918   _GPIOIntTypeSet
1180bb6c   _GPIOPinIntClear
1180bb0c   _GPIOPinIntStatus
1180b8b8   _GPIOPinRead
1180b838   _GPIOPinWrite
118162fc   _HW_DEF_BLUE_LED
11816310   _HW_DEF_GPIO_PIN_HIGH
1181630c   _HW_DEF_GPIO_PIN_LOW
11816304   _HW_DEF_GREEN_LED
118162f4   _HW_DEF_MS_TIMER_CLK_FREQ
11816300   _HW_DEF_RED_LED
118162f8   _HW_DEF_US_TIMER_CLK_FREQ
11816308   _HW_DEF_YELLOW_LED
1180b160   _IntDSPINTCInit
1180b510   _IntDisable
1180b4e0   _IntEnable
1180b2d8   _IntEventClear
1180b414   _IntEventCombineAdd
1180b310   _IntEventCombineInit
1180b4b8   _IntEventCombineRegister
1180b468   _IntEventCombineRemove
1180b21c   _IntEventMap
1180b2a4   _IntEventSet
1180b56c   _IntGlobalDisable
1180b558   _IntGlobalEnable
1180b580   _IntGlobalRestore
1180b1d0   _IntRegister
1180b544   _IntReset
1180b1f4   _IntUnRegister
1180d600   _PSCModuleControl
1180c660   _SYSPinMuxSetup
1180c778   _SYSPll0Init
1180c98c   _SYSPll1Init
1180c6d8   _SYSPscSetup
1180d2f4   _SysDelayTimerReset
1180d2cc   _SysDelayTimerSetup
1180d348   _Sysdelay
1180a828   _TimerCaptureConfigure
1180a624   _TimerCaptureGet
1180a9d0   _TimerClockModeSet
1180a674   _TimerCompareGet
1180a650   _TimerCompareSet
1180a3b4   _TimerConfigure
1180a590   _TimerCounterGet
1180a554   _TimerCounterSet
1180a37c   _TimerDisable
1180a80c   _TimerDivDwnRatio34Get
1180a7b8   _TimerDivDwnRatio34Set
1180a320   _TimerEnable
1180a930   _TimerInputGateDisable
1180a8f8   _TimerInputGateEnable
1180a6c4   _TimerIntDisable
1180a694   _TimerIntEnable
1180a710   _TimerIntStatusClear
1180a6f0   _TimerIntStatusGet
1180aab0   _TimerInvertINDisable
1180aa78   _TimerInvertINEnable
1180ab28   _TimerInvertOUTDisable
1180aaec   _TimerInvertOUTEnable
1180aa48   _TimerOUTStatusGet
1180a528   _TimerPeriodGet
1180a4ec   _TimerPeriodSet
1180a7a0   _TimerPreScalarCount34Get
1180a74c   _TimerPreScalarCount34Set
1180aa0c   _TimerPulseModeSet
1180a96c   _TimerPulseWidthSet
1180a8c0   _TimerReadResetDisable
1180a888   _TimerReadResetEnable
1180a5f4   _TimerReloadGet
1180a5c0   _TimerReloadSet
1180a42c   _TimerReset
1180a464   _TimerWatchdogActivate
1180a4a4   _TimerWatchdogReactivate
11809c78   _UART0FlushRxBuffer
11809aa0   _UART0Init
11809b38   _UART0InitInterrupts
11809b84   _UART0Isr
11809c8c   _UART0Receive
11809c60   _UART0RxBytesAvailable
11809d40   _UART0Transmit
11809c44   _UART0TxBusy
1180a214   _UARTBreakCtl
1180a10c   _UARTCharGet
1180a0d4   _UARTCharGetNonBlocking
1180a148   _UARTCharPut
1180a094   _UARTCharPutNonBlocking
1180a048   _UARTCharsAvail
11809e40   _UARTConfigGetExpClk
11809da8   _UARTConfigSetExpClk
11809f14   _UARTDMADisable
11809ef4   _UARTDMAEnable
11809fc0   _UARTDisable
11809fa4   _UARTEnable
1180a004   _UARTFIFODisable
11809fec   _UARTFIFOEnable
11809ed0   _UARTFIFOLevelSet
11809d90   _UARTGetLineStatus
1180a1c4   _UARTIntDisable
1180a198   _UARTIntEnable
1180a1ec   _UARTIntStatus
1180a2a0   _UARTModemControlClear
1180a2d0   _UARTModemControlGet
1180a24c   _UARTModemControlSet
1180a2f0   _UARTModemStatusGet
11809f80   _UARTParityModeGet
11809f34   _UARTParityModeSet
1180a074   _UARTRxErrorGet
1180a018   _UARTSpaceAvail
11815640   __STACK_END
00002800   __STACK_SIZE
00005000   __SYSMEM_SIZE
00000001   __TI_args_main
1180dd20   ___TI_cpp_init
118160e0   ___TI_enable_exit_profile_output
ffffffff   ___TI_pprof_out_hndl
ffffffff   ___TI_prof_data_size
ffffffff   ___TI_prof_data_start
ffffffff   ___binit__
118162f4   ___bss__
ffffffff   ___c_args__
118160f8   ___cinit__
1180bcc0   ___ct__14Rm_c6748_timerFbN21
1180ab60   ___ct__Q2_10ram_tester10Ram_testerFv
1180ddc0   ___default_new_handler__Fv
1180dde0   ___dl__FPv
1180bd20   ___dt__14Rm_c6748_timerFv
1180aba0   ___dt__Q2_10ram_tester10Ram_testerFv
11816340   ___end__
1180de40   ___etext__
1180d980   ___nw__FUi
ffffffff   ___pinit__
11808000   ___text__
11816360   ___vtbl__Q2_10ram_tester10Ram_tester
1180adb8   __addr_bus_test__Q2_10ram_tester10Ram_testerFv
1180d3c0   __args_main
1180d740   __auto_init
1180d800   __c6xabi_divu
118160d8   __cleanup_ptr
1180ad2c   __data_bus_test__Q2_10ram_tester10Ram_testerFv
1180d800   __divu
118160dc   __dtors_ptr
1180dca0   __fixdu
118160e4   __lock
1180abd4   __main_state_machine__Q2_10ram_tester10Ram_testerFv
118160f4   __new_handler
1180de00   __nop
1180afe0   __ram_device_test__Q2_10ram_tester10Ram_testerFv
11812e40   __stack
1180ad08   __state_error__Q2_10ram_tester10Ram_testerFv
1180acec   __state_force_reset__Q2_10ram_tester10Ram_testerFv
1180ac28   __state_init__Q2_10ram_tester10Ram_testerFv
1180ac60   __state_testing__Q2_10ram_tester10Ram_testerFv
1180de40   __sys_memory
118160e8   __unlock
1180de20   _abort
11808ff8   _c674x_mask_int10_isr
118091c0   _c674x_mask_int11_isr
11809384   _c674x_mask_int12_isr
11809548   _c674x_mask_int13_isr
11809710   _c674x_mask_int14_isr
118098d8   _c674x_mask_int15_isr
11808550   _c674x_mask_int4_isr
11808718   _c674x_mask_int5_isr
118088e0   _c674x_mask_int6_isr
11808aa4   _c674x_mask_int7_isr
11808c68   _c674x_mask_int8_isr
11808e30   _c674x_mask_int9_isr
11808000   _c674x_nmi_isr
118081c4   _c674x_rsvd_int2_isr
11808388   _c674x_rsvd_int3_isr
11816400   _c_int00
1180da20   _copy_in
1180bdec   _disable_timer0__14Rm_c6748_timerFv
1180c054   _disable_timer1__14Rm_c6748_timerFv
1180c148   _disable_timer2__14Rm_c6748_timerFv
1180bdcc   _enable_timer0__14Rm_c6748_timerFv
1180c030   _enable_timer1__14Rm_c6748_timerFv
1180c124   _enable_timer2__14Rm_c6748_timerFv
1180abc8   _execute__Q2_10ram_tester10Ram_testerFv
1180d8c0   _exit
11816090   _failure_str1__10ram_tester
11816330   _failure_str1_len__10ram_tester
118160a8   _failure_str2__10ram_tester
11816334   _failure_str2_len__10ram_tester
118160c0   _failure_str3__10ram_tester
11816338   _failure_str3_len__10ram_tester
1180ce60   _free
11816314   _g_c6748_timers
1180be08   _get_timer0_counter_value__14Rm_c6748_timerFv
1180c074   _get_timer1_counter_value__14Rm_c6748_timerFv
1180c168   _get_timer2_counter_value__14Rm_c6748_timerFv
1180cb40   _hw_def_cleanup__Fv
1180cc08   _hw_def_disable_global_interrupts__Fv
1180cc64   _hw_def_enable_timer1__Fv
1180cc78   _hw_def_get_timer1_cntr_val__Fv
1180cb20   _hw_def_init__Fv
1180ccd0   _hw_def_init_cache__Fv
1180cbf4   _hw_def_init_global_interrupts__Fv
1180cb68   _hw_def_init_gpio__Fv
1180cb58   _hw_def_init_pinmux__Fv
1180cca4   _hw_def_init_pll0__Fv
1180cb4c   _hw_def_init_psc__Fv
1180cc4c   _hw_def_init_timer1_for_timing__FUi
1180cc14   _hw_def_init_timers__Fv
1180ccf0   _hw_def_init_uart0__Fv
1180cd00   _hw_def_invalidate_cache__Fv
1180cd14   _hw_def_reset_dsp__Fv
1180cc90   _hw_def_reset_timers__Fv
1180cd4c   _hw_def_set_led_state__FUiT1
1180cd40   _hw_def_sys_delay_ms__FUi
1180cda4   _hw_def_toggle_led__FUi
1180ce38   _hw_def_uart0_flush_rx_buffer__Fv
1180ce48   _hw_def_uart0_receive__FPUcUi
1180ce20   _hw_def_uart0_rx_bytes_available__Fv
1180ce08   _hw_def_uart0_transmit__FPUcUi
1180bd48   _init_timer0_for_timing__14Rm_c6748_timerFUi
1180be24   _init_timer1_as_watchdog__14Rm_c6748_timerFUiT1
1180bfa8   _init_timer1_for_timing__14Rm_c6748_timerFUi
1180c094   _init_timer2_for_timing__14Rm_c6748_timerFUi
1180d400   _intcVectorTable
1180dd80   _main
1180d0e0   _malloc
1180dac0   _memcpy
11816080   _success_str__10ram_tester
1181632c   _success_str_len__10ram_tester
1180bf78   _timer1_force_watchdog_timeout__14Rm_c6748_timerFv
1180bf44   _timer1_kick_watchdog__14Rm_c6748_timerFv
11815a40   _uart0RxBuffer
11816328   _uart0RxRdIdx
11816324   _uart0RxWrIdx
11815640   _uart0TxBuffer
11816320   _uart0TxRdIdx
1181631c   _uart0TxWrIdx
ffffffff   binit
118160f8   cinit
11816340   end
1180de40   etext
ffffffff   pinit


GLOBAL SYMBOLS: SORTED BY Symbol Address 

address    name
--------   ----
00000001   __TI_args_main
00002800   __STACK_SIZE
00005000   __SYSMEM_SIZE
11808000   .text
11808000   ___text__
11808000   _c674x_nmi_isr
118081c4   _c674x_rsvd_int2_isr
11808388   _c674x_rsvd_int3_isr
11808550   _c674x_mask_int4_isr
11808718   _c674x_mask_int5_isr
118088e0   _c674x_mask_int6_isr
11808aa4   _c674x_mask_int7_isr
11808c68   _c674x_mask_int8_isr
11808e30   _c674x_mask_int9_isr
11808ff8   _c674x_mask_int10_isr
118091c0   _c674x_mask_int11_isr
11809384   _c674x_mask_int12_isr
11809548   _c674x_mask_int13_isr
11809710   _c674x_mask_int14_isr
118098d8   _c674x_mask_int15_isr
11809aa0   _UART0Init
11809b38   _UART0InitInterrupts
11809b84   _UART0Isr
11809c44   _UART0TxBusy
11809c60   _UART0RxBytesAvailable
11809c78   _UART0FlushRxBuffer
11809c8c   _UART0Receive
11809d40   _UART0Transmit
11809d90   _UARTGetLineStatus
11809da8   _UARTConfigSetExpClk
11809e40   _UARTConfigGetExpClk
11809ed0   _UARTFIFOLevelSet
11809ef4   _UARTDMAEnable
11809f14   _UARTDMADisable
11809f34   _UARTParityModeSet
11809f80   _UARTParityModeGet
11809fa4   _UARTEnable
11809fc0   _UARTDisable
11809fec   _UARTFIFOEnable
1180a004   _UARTFIFODisable
1180a018   _UARTSpaceAvail
1180a048   _UARTCharsAvail
1180a074   _UARTRxErrorGet
1180a094   _UARTCharPutNonBlocking
1180a0d4   _UARTCharGetNonBlocking
1180a10c   _UARTCharGet
1180a148   _UARTCharPut
1180a198   _UARTIntEnable
1180a1c4   _UARTIntDisable
1180a1ec   _UARTIntStatus
1180a214   _UARTBreakCtl
1180a24c   _UARTModemControlSet
1180a2a0   _UARTModemControlClear
1180a2d0   _UARTModemControlGet
1180a2f0   _UARTModemStatusGet
1180a320   _TimerEnable
1180a37c   _TimerDisable
1180a3b4   _TimerConfigure
1180a42c   _TimerReset
1180a464   _TimerWatchdogActivate
1180a4a4   _TimerWatchdogReactivate
1180a4ec   _TimerPeriodSet
1180a528   _TimerPeriodGet
1180a554   _TimerCounterSet
1180a590   _TimerCounterGet
1180a5c0   _TimerReloadSet
1180a5f4   _TimerReloadGet
1180a624   _TimerCaptureGet
1180a650   _TimerCompareSet
1180a674   _TimerCompareGet
1180a694   _TimerIntEnable
1180a6c4   _TimerIntDisable
1180a6f0   _TimerIntStatusGet
1180a710   _TimerIntStatusClear
1180a74c   _TimerPreScalarCount34Set
1180a7a0   _TimerPreScalarCount34Get
1180a7b8   _TimerDivDwnRatio34Set
1180a80c   _TimerDivDwnRatio34Get
1180a828   _TimerCaptureConfigure
1180a888   _TimerReadResetEnable
1180a8c0   _TimerReadResetDisable
1180a8f8   _TimerInputGateEnable
1180a930   _TimerInputGateDisable
1180a96c   _TimerPulseWidthSet
1180a9d0   _TimerClockModeSet
1180aa0c   _TimerPulseModeSet
1180aa48   _TimerOUTStatusGet
1180aa78   _TimerInvertINEnable
1180aab0   _TimerInvertINDisable
1180aaec   _TimerInvertOUTEnable
1180ab28   _TimerInvertOUTDisable
1180ab60   ___ct__Q2_10ram_tester10Ram_testerFv
1180aba0   ___dt__Q2_10ram_tester10Ram_testerFv
1180abc8   _execute__Q2_10ram_tester10Ram_testerFv
1180abd4   __main_state_machine__Q2_10ram_tester10Ram_testerFv
1180ac28   __state_init__Q2_10ram_tester10Ram_testerFv
1180ac60   __state_testing__Q2_10ram_tester10Ram_testerFv
1180acec   __state_force_reset__Q2_10ram_tester10Ram_testerFv
1180ad08   __state_error__Q2_10ram_tester10Ram_testerFv
1180ad2c   __data_bus_test__Q2_10ram_tester10Ram_testerFv
1180adb8   __addr_bus_test__Q2_10ram_tester10Ram_testerFv
1180afe0   __ram_device_test__Q2_10ram_tester10Ram_testerFv
1180b160   _IntDSPINTCInit
1180b1d0   _IntRegister
1180b1f4   _IntUnRegister
1180b21c   _IntEventMap
1180b2a4   _IntEventSet
1180b2d8   _IntEventClear
1180b310   _IntEventCombineInit
1180b414   _IntEventCombineAdd
1180b468   _IntEventCombineRemove
1180b4b8   _IntEventCombineRegister
1180b4e0   _IntEnable
1180b510   _IntDisable
1180b544   _IntReset
1180b558   _IntGlobalEnable
1180b56c   _IntGlobalDisable
1180b580   _IntGlobalRestore
1180b598   _ExcGlobalEnable
1180b5b8   _ExcCombineAdd
1180b600   _ExcCombineRemove
1180b740   _GPIODirModeSet
1180b7d8   _GPIODirModeGet
1180b838   _GPIOPinWrite
1180b8b8   _GPIOPinRead
1180b918   _GPIOIntTypeSet
1180ba84   _GPIOIntTypeGet
1180bb0c   _GPIOPinIntStatus
1180bb6c   _GPIOPinIntClear
1180bbb4   _GPIOBankIntEnable
1180bbe4   _GPIOBankIntDisable
1180bc10   _GPIOBankPinsWrite
1180bcc0   ___ct__14Rm_c6748_timerFbN21
1180bd20   ___dt__14Rm_c6748_timerFv
1180bd48   _init_timer0_for_timing__14Rm_c6748_timerFUi
1180bdcc   _enable_timer0__14Rm_c6748_timerFv
1180bdec   _disable_timer0__14Rm_c6748_timerFv
1180be08   _get_timer0_counter_value__14Rm_c6748_timerFv
1180be24   _init_timer1_as_watchdog__14Rm_c6748_timerFUiT1
1180bf44   _timer1_kick_watchdog__14Rm_c6748_timerFv
1180bf78   _timer1_force_watchdog_timeout__14Rm_c6748_timerFv
1180bfa8   _init_timer1_for_timing__14Rm_c6748_timerFUi
1180c030   _enable_timer1__14Rm_c6748_timerFv
1180c054   _disable_timer1__14Rm_c6748_timerFv
1180c074   _get_timer1_counter_value__14Rm_c6748_timerFv
1180c094   _init_timer2_for_timing__14Rm_c6748_timerFUi
1180c124   _enable_timer2__14Rm_c6748_timerFv
1180c148   _disable_timer2__14Rm_c6748_timerFv
1180c168   _get_timer2_counter_value__14Rm_c6748_timerFv
1180c328   _CacheEnable
1180c408   _CacheDisable
1180c488   _CacheEnableMAR
1180c520   _CacheDisableMAR
1180c5ac   _CacheInvL1pAll
1180c5b8   _CacheInvL1dAll
1180c5c8   _CacheInvL2All
1180c5d4   _CacheWBAll
1180c5e4   _CacheWBInvAll
1180c5f0   _CacheInv
1180c60c   _CacheWB
1180c628   _CacheWBInv
1180c660   _SYSPinMuxSetup
1180c6d8   _SYSPscSetup
1180c778   _SYSPll0Init
1180c98c   _SYSPll1Init
1180cb20   _hw_def_init__Fv
1180cb40   _hw_def_cleanup__Fv
1180cb4c   _hw_def_init_psc__Fv
1180cb58   _hw_def_init_pinmux__Fv
1180cb68   _hw_def_init_gpio__Fv
1180cbf4   _hw_def_init_global_interrupts__Fv
1180cc08   _hw_def_disable_global_interrupts__Fv
1180cc14   _hw_def_init_timers__Fv
1180cc4c   _hw_def_init_timer1_for_timing__FUi
1180cc64   _hw_def_enable_timer1__Fv
1180cc78   _hw_def_get_timer1_cntr_val__Fv
1180cc90   _hw_def_reset_timers__Fv
1180cca4   _hw_def_init_pll0__Fv
1180ccd0   _hw_def_init_cache__Fv
1180ccf0   _hw_def_init_uart0__Fv
1180cd00   _hw_def_invalidate_cache__Fv
1180cd14   _hw_def_reset_dsp__Fv
1180cd40   _hw_def_sys_delay_ms__FUi
1180cd4c   _hw_def_set_led_state__FUiT1
1180cda4   _hw_def_toggle_led__FUi
1180ce08   _hw_def_uart0_transmit__FPUcUi
1180ce20   _hw_def_uart0_rx_bytes_available__Fv
1180ce38   _hw_def_uart0_flush_rx_buffer__Fv
1180ce48   _hw_def_uart0_receive__FPUcUi
1180ce60   _free
1180d0e0   _malloc
1180d2cc   _SysDelayTimerSetup
1180d2f4   _SysDelayTimerReset
1180d348   _Sysdelay
1180d3c0   __args_main
1180d400   _intcVectorTable
1180d600   _PSCModuleControl
1180d740   __auto_init
1180d800   __c6xabi_divu
1180d800   __divu
1180d8c0   _exit
1180d980   ___nw__FUi
1180da20   _copy_in
1180dac0   _memcpy
1180dca0   __fixdu
1180dd20   ___TI_cpp_init
1180dd80   _main
1180ddc0   ___default_new_handler__Fv
1180dde0   ___dl__FPv
1180de00   __nop
1180de20   C$$EXIT
1180de20   _abort
1180de40   ___etext__
1180de40   __sys_memory
1180de40   etext
11812e40   __stack
11815640   __STACK_END
11815640   _uart0TxBuffer
11815a40   _uart0RxBuffer
11816080   _success_str__10ram_tester
11816090   _failure_str1__10ram_tester
118160a8   _failure_str2__10ram_tester
118160c0   _failure_str3__10ram_tester
118160d8   __cleanup_ptr
118160dc   __dtors_ptr
118160e0   ___TI_enable_exit_profile_output
118160e4   __lock
118160e8   __unlock
118160f4   __new_handler
118160f8   ___cinit__
118160f8   cinit
118162f4   $bss
118162f4   .bss
118162f4   _HW_DEF_MS_TIMER_CLK_FREQ
118162f4   ___bss__
118162f8   _HW_DEF_US_TIMER_CLK_FREQ
118162fc   _HW_DEF_BLUE_LED
11816300   _HW_DEF_RED_LED
11816304   _HW_DEF_GREEN_LED
11816308   _HW_DEF_YELLOW_LED
1181630c   _HW_DEF_GPIO_PIN_LOW
11816310   _HW_DEF_GPIO_PIN_HIGH
11816314   _g_c6748_timers
1181631c   _uart0TxWrIdx
11816320   _uart0TxRdIdx
11816324   _uart0RxWrIdx
11816328   _uart0RxRdIdx
1181632c   _success_str_len__10ram_tester
11816330   _failure_str1_len__10ram_tester
11816334   _failure_str2_len__10ram_tester
11816338   _failure_str3_len__10ram_tester
11816340   ___end__
11816340   end
11816360   ___vtbl__Q2_10ram_tester10Ram_tester
11816400   _c_int00
ffffffff   ___TI_pprof_out_hndl
ffffffff   ___TI_prof_data_size
ffffffff   ___TI_prof_data_start
ffffffff   ___binit__
ffffffff   ___c_args__
ffffffff   ___pinit__
ffffffff   binit
ffffffff   pinit

[263 symbols]

    I would have to investigate the possibility for some interrupt being set at that point. As far as this application is concerned, only the Timer2 and UART0 interrupts are enabled, but the program runs into the weeds before these interrupts are even configured. It might be some exception?

  • 0 in reply to Rahul Prabhu
    Expert 2425 points

    Hi Rahul,

    I still have not managed to sort this out. I have used the settings in the INI file, which you have provided for exiting in SECUREWITHSK mode, in particular the MPU and IOPU settings I am using:

    [MPUCONFIG]
MPUSELECT = 0x000001FF
STARTADDR = 0x00000000
ENDADDR   = 0xFFFFFFFF
MPPAVALUE = 0xFFFFFFFF

[MPUCONFIG]
MPUSELECT = 0x000002FF
STARTADDR = 0x00000000
ENDADDR   = 0xFFFFFFFF
MPPAVALUE = 0xFFFFFFFF

[IOPUCONFIG]
IOPUSELECT = 0x000000FF
MPPAVALUE  = 0xFFFFFFFF

[IOPUCONFIG]
IOPUSELECT = 0x000100FF
MPPAVALUE  = 0xFFFFFFFF

[IOPUCONFIG]
IOPUSELECT = 0x000200FF
MPPAVALUE  = 0xFFFFFFFF

[IOPUCONFIG]
IOPUSELECT = 0x000300FF
MPPAVALUE  = 0xFFFFFFFF

[IOPUCONFIG]
IOPUSELECT = 0x000600FF
MPPAVALUE  = 0xFFFFFFFF

[IOPUCONFIG]
IOPUSELECT = 0x00060707
MPPAVALUE  = 0x00000000

    The program (which is located entirely in L2 RAM) runs into the weeds (it ends up at address 0x7F7FF0 every time) the moment I set the interrupt service table pointer register:

    ISTP = (unsigned int)intcVectorTable;

    where intcVectorTable is defined in the TI supplied assembler file, which came with the C6748 starterware:

    4621.int_vecs.asm

    This is really frustrating, because I do not understand what is causing this problem and the documentation on the secure kernel does seem to mention anything that can give me an indication of what is going wrong. The only example I have, which exits in SECUREWITHSK, do not use interrupts at all. Is this perhaps somehow related to the way the secure kernel manages the stack or is this some sort of exception being thrown?

    Is there any other specific permissions I have to set in the INI file?

    Can you please provide some additional examples which use interrupts?

     

  • 0 in reply to ReinierC
    TI__Guru** 116770 points

    Hi Reinier,

    Sorry to know that you are running into these issues. As I have mentioned earlier, the secure C6748 parts do not support run time security so the only supported use case of exiting with SECUREWITHSK is when you are binding the flash image to the device. This usage doesn`t require handling of interrupts as it is done as a pre-production step to boot the application image securely and doesn`t need to deal with interrupts from peripherals while performing the binding operations. Hence we have not created examples to test setting up of peripherals when the secure kernel is running.

    Also if you are using BIOS and starterware together there are some interrupt related issues reported in the past. Is this use case passing when you exit in NON-Secure state?

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Expert 2425 points

    Rahul,

    I am simply trying to use this for the binding phase. The reason why I am doing it in this way, is because I do not want to have a separate application for first flashing the encrypted image and then have a second application to perform the secure binding.

    I want to boot the C6748 over UART in SECUREWITHSK mode, then transfer the entire encrypted image over UART from the PC-based application, perform the binding on the image and only then flash the image.

    Do I have to split this process up into two separate applications?

    I am not mixing BIOS and the starterware, its a pure non-DSP/BIOS application.