C6743 , C6745 , C6747 peformance difference

hakeen

Other Parts Discussed in Thread: OMAP-L137

C6747 has 64KB L1 , 256KB L2 , 128KB L3 cache

C6745 has 64KB L1 , 256KB L2 cache

C6743 has 64KB L1 , 128KB L2 cache

I'm developing on OMAP-L137 EVM. This EVM contain C6747.

Can I change L1/L2/L3 cache in software? Then, I could simulate C6743/6745/6747?

Or, I'm afraid the cache size could impact the software performance?

0 Titusrathinaraj Stalin over 11 years ago

Hi Hakeen,

Yes,

L1P/D will be cache by default,

L2 is in RAM config mode by default,

L3 is shared RAM.

You can change/modify the cache registers sizes and default (RAM/cache) to user requirement.

Please refer the OMAPL137 TRM in chapter 5.3 DSP memories

0 hakeen over 11 years ago in reply to Titusrathinaraj Stalin

Thx!

Section 5.3 really help me : )

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