• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 99 subscribers
  • Views 508 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

OSD0 VID0 flicker problem

Ferhat OLGUN
Expert 1080 points


Hi to all,

There are two types of flicker problem on my DM6446EVM with the following configurations

-4.3" 480x272  LCD + CCD camera

-4.3"  480x272 LCD + Aptina MT9V113

First flicker appears on OSD0 as soon as I write "modprobe davinci_capture device_type=0" or "modprobe davinci_capture device_type=1" .  The problem becomes more severe on the first configuration (LCD+ CCD camera). It causes "flashing" on my screen.

Second flicker appears on VID0 (fb/1)  which is different than the flicker in OSD0.

I read that there are some silicon issues related to these problems (vid0 and vid1 at the same time was said to cause flicker). Could you please give me the link of the document explaining these problems? May an external VPBE clock of 9 MHz for my 4.3" LCD be the reason for these problems?

 

Regards

Ferhat

 

 

  • 0
    TI__Mastermind 41665 points

    Ferhat OLGUN said:
    I read that there are some silicon issues related to these problems (vid0 and vid1 at the same time was said to cause flicker). Could you please give me the link of the document explaining these problems? 

    Any silicon issues for the part should be given in the silicon errata here, the major one that would come to mind here would be the inverted field for OSD0 however that was fixed in silicon rev 2.1, and any modern display drivers should have the fix taken into account. There are also some constraints given in section 5.4.5 of SPRU37c that must be followed, the major one being that all other windows must be fully contained within vid0, perhaps this is what you were referencing?

    One other thought is that since you mention this only seems to happen when you simply enable the capture interfaces is that this may be some bandwidth constraint related issue. This sort of issue is described in section 2.1.2 of the errata, it may be worth trying to tweak the PBBPR register mentioned there.

  • 0 in reply to Bernie Thompson TI
    Expert 1080 points

    Hi,

    Looking at the silicon errata (sprz241m), I could not understand whether my display driver is the one you mentioned as "modern display drivers that has fixes" or not. How can I understand whether my display driver has these fixes?

    I tried with vid0 (remote video) containing the vid1(local video) but problem still exist. Only vid0 has a flicker at all these cases.

    Thanks,

    Ferhat

     

  • 0 in reply to Ferhat OLGUN
    TI__Mastermind 37340 points

    I believe he meant any recent driver as in our last two DVSDKs; if you are using DVSDK 2.00.00.22, then you can be sure you have the driver fixes.

    That said, there are constains mentioned in VPBE UG, primarily due to hardware buffering in one of the video windows which limits the size of resolutions it can support.  Hence VPBE UG recommends that when using HD resolutions, you use VID0.  But in your case, you are not using HD resolutions so it would appear you are not running into this constraint.  There are other constraints such as VID0 must be the largest window of them all....so please make sure you are complying with all constraints described in VPBE UG.  If this still does not fix the issue, then it is likely a timing issue between what VPBE is putting out, and what the LCD Display can handle or expects; you can certainly connect an oscilloscope and see the data at the VPBE pins to determine if it is what you would expect.

     

  • 0 in reply to Juan Gonzales
    Expert 1080 points

    I am using DVSDK 1.3 with LSP version 1.20.00.014 however I recognized that DM6446 on EVM has a code "TMS320DM6446ZWT" which means that regarding the silicon errata it is Silicon Verison 1.3.  Is it possible to see such artifacts in this silicon version independent of DVSDK version ?

  • 0 in reply to Ferhat OLGUN
    TI__Mastermind 37340 points

    You should not see the field inversion problem as there is a software work-around in the drivers to account for this; however, this would be easy to verify.  By default, the driver use VID1 which does not have this field inversion issue; it only uses VID0 when doing HD.   Did you make any changes to the driver to support your desired resolution... if so, what video and OSD windows are you using?

    You should definitely not see the HD constrain issue at this resolution.