Hello engineers,
I'm troubled by unexpected abort of CPPI DMA.
I'm developing an USB full-speed device on DM6446.
My device executes bulk IN transfers with CPPI DMA transparent mode.
The CPPI transmit buffer descriptors are allocated on a SDRAM.
When I run the USB 2.0 controller separately, (i.e. no other peripherals accesses the SDRAM,) everything goes well, and the CPPI DMA works continuously for more than 36 hours.
However, if there is another peripheral that accesses the SDRAM, the DMA transfer stops in a few minutes.
Further investigation has revealed that the location of the CPPI transmit buffer descriptors dominates the problem:
- Place the descriptors on SDRAM (with cache enabled) ... The problem occurs.
- Place the descriptors on SDRAM (with cache disabled) ... Still the problem occurs.
- Place the descriptors on ARM RAM1 (Data) (with cache disabled) ... Works fine.
The last option could be a workaround, but I'm not sure of the cause of the problem.
From the standpoint of the specification of CPPI, are there any causes that bring the DMA to a halt?
In particular, are there any restrictions on the location of the CPPI transmit buffer descriptors?
Thank you.