Conditional statements in .cfg file

gokhantanisik

Hi,

I have an application that will run on four cores of a C6678. I would like to load the same .out file to these four cores but it requires me to have conditional statements in my .cfg file. Because the DDR3 memory space allocated for each instance must be different. I need something like the pseudo-code given below;

if current core is 0

put .text to DDR3_C0

if current core is 1

put .text to DDR3_C1

if current core is 7

put .text to DDR3_C7

How do I write such a .cfg file? Does XGCONF GUI handle such? Which document(s) should I read to get used to writing .cfg files? Is there a better way to build a memory structure similar to the one that I have mentioned above?

I am using CCS5.4 with C6678 Multicore DSP.

over 11 years ago

0 Raja over 11 years ago

TI__Guru* 81335 points

Hi,

Moved this thread to correct forum.

Thanks.

0 Brandy Jabkiewicz over 11 years ago

Mastermind 6325 points

I have the same .out file for all the cores. They all run it from the same location in DDR3. It is okay for the .text sections to be shared. What is different is that they need to have their own memory heap and a few other smaller sections that fit in L2SRAM as well. For the heaps, you can do this by assigning stacks in the cfg file and then in your main. Here is my example:

cfg:

//Core 0 needs a large heap to run the MHT instance and the cluster search.
//This heap is assigned as Core0MainTask's stack
heapMemParams.size = (132)*1024; 
heapMemParams.sectionName = ".myHeapSection";
Program.global.myHeap0 = HeapMem.create(heapMemParams);

//These smaller heaps are the WorkerTaskMain's stack.  They only need to support the BIOS calls for the Assoc and Solver Tasks.  No recursion.
heapMemParams.size = 70*1024; 
heapMemParams.sectionName = ".myHeapSection";
Program.global.myHeap1 = HeapMem.create(heapMemParams);
Program.global.myHeap2 = HeapMem.create(heapMemParams);
Program.global.myHeap3 = HeapMem.create(heapMemParams);
Program.global.myHeap4 = HeapMem.create(heapMemParams);
Program.global.myHeap5 = HeapMem.create(heapMemParams);
Program.global.myHeap6 = HeapMem.create(heapMemParams);
Program.global.myHeap7 = HeapMem.create(heapMemParams);

Main:

int main(Void)
{
    Task_Params     				taskParams;
    ti_sysbios_heaps_HeapMem_Handle taskHeaps[MAX_NUM_TRACKER_CORES];

    int status = Ipc_start();
    if(status < ITS_A_OKAY)
	{
    	LOG_ERROR("No IPC Start, cannot use shared memory. Error code %i. Exiting program with no work done.", status);
    	return -1;
	}
    whoseRunning = 0;
//    Cache_setMar((xdc_Ptr)0x0c000000,0x00400000,Cache_Mar_DISABLE);

    /* Initialize the system only if the core was configured to do so. */
    if (CORE_NUM == CORE_SYS_INIT)
    {
    	LOG_DEBUG("Beginning system initialization.");

        LOG_DEBUG("Size of char %i, short %i, int %i, float %i, double %i, long long %i, bool %i, HeapMemMP_Handle %i", sizeof(char), sizeof(short), sizeof(int), sizeof(float), sizeof(double), sizeof (long long), sizeof(bool), sizeof(HeapMemMP_Handle));

        /* Create the DIO Example Task.*/
        Task_Params_init(&taskParams);
        taskParams.instance->name = "Core0SystemInit";
        taskParams.arg0 = CORE0_MAIN_TASK;
        taskParams.arg1 = DSP_SRIO_TRACKER_ID_8BIT;
        Task_create((ti_sysbios_knl_Task_FuncPtr)core0SystemInit, &taskParams, NULL);
        /* Create the Network Task.*/
        LOG_DEBUG("Creating network task with heap 0x%x", myNetworkHeap0);
        Task_Params_init(&taskParams);
        taskParams.instance->name = "core0NetworkSetup";
    	//taskParams.stackSize = 70*1024;
        taskParams.arg0 = NETWORK_TASK;
        taskParams.arg1 = inet_addr(dspTrackerIP);
        taskParams.stackHeap = HeapMem_Handle_to_xdc_runtime_IHeap(myNetworkHeap0);
        Task_create((ti_sysbios_knl_Task_FuncPtr)core0NetworkSetup, &taskParams, NULL);
    }
    else //if (CORE_NUM <= 1)
    {
     	//The local cache or program stack, does not have enough space to support two tasks starting from main and all necessary variables.
    	//Therefore, we need to start new "mains" for each worker core.  This will just be a filler jump to
    	//start the assoc and solver tasks.
    	waitForSomeoneToRun(CORE0_MAIN_TASK);
    	taskHeaps[0] = myHeap1;
    	taskHeaps[1] = myHeap2;
    	taskHeaps[2] = myHeap3;
    	taskHeaps[3] = myHeap4;
    	taskHeaps[4] = myHeap5;
    	taskHeaps[5] = myHeap6;
    	taskHeaps[6] = myHeap7;
    	Task_Params_init(&taskParams);
    	taskParams.stackSize = WORKER_STACK_SIZE;
    	taskParams.stackHeap = HeapMem_Handle_to_xdc_runtime_IHeap(taskHeaps[CORE_NUM-1]);
    	taskParams.instance->name = "WorkerMain";
		taskParams.arg0 = (CORE0_MAIN_TASK << CORE_NUM);
		if(taskParams.stackHeap == NULL)
		{
//			sprintf(buffer,"No heap initialized.");
//			ekg_vfib(buffer, CORE_NUM, CORE_NUM);
			LOG_ERROR("No heap.");
		}
		else
		{
			LOG_DEBUG("Starting WorkerMain Task with heap 0x%x.", taskHeaps[CORE_NUM-1]);
			Task_create((ti_sysbios_knl_Task_FuncPtr)WorkerMain, &taskParams, NULL);
		}


    }

Maybe this helps :)
Brandy

    /* Start the BIOS */
    BIOS_start();
}

0 gokhantanisik over 11 years ago in reply to Brandy Jabkiewicz

Prodigy 50 points

The problem is not with the .text section. I did specify eight distinct regions in the DDR3 to be used by eight different cores. I would like to have the ability to use the same .cfg file and same .out file for some cores and load some sections to the desired region conditionally as I have mentioned above. ".text" was just an example. Sorry for the confusing post, thank you for your answer but that is not actually the answer of my question.

Regards,

Gokhan.

0 judahvang over 11 years ago in reply to gokhantanisik

TI__Mastermind 32475 points

Gokhan,

You cannot linke .text to a different part of DDR3 especially if you want to share the same executable on all cores.

You would only be doing conditionals in your .cfg file if you were building different executables for different cores.

With 1 executable to be run on all cores means that .text must be in some shared memory space. Also as the previous poster said, you would need your data in different memory between all cores.

Judah

0 Brandy Jabkiewicz over 11 years ago in reply to judahvang

Mastermind 6325 points

Gokhan,

Maybe I am still guessing about what your problem is, but I will give you another suggestion. Another thing I did was make my own platform. In this way, I could divide, for example, MSMCSRAM into smaller sections. Then I could make specific data go into that section. I used the sections to make arrays and each core addressed its section in the array by the core id. Is this what you are trying to think about?

See here is my platform:

Here is the config for those sections:

Program.sectMap[".msmcsramHeap"] 	= "MSMCSRAM"; 
Program.sectMap[".ethSharedMem"]	= "MSMCSRAM";
Program.sectMap[".srioSharedMem"] 	= "MSMCSRAM";
Program.sectMap[".cfgHeaders"]		= "MSMCSRAM_CFG_HDR";
Program.sectMap[".fpgaHeaders"]		= "MSMCSRAM_FPGA_HDRS";

and here is the code:

#pragma DATA_SECTION (".fpgaHeaders")
ImageHeaderStruct far imgHdrs[8];

Does this idea help any? To place data in a special section - you can see I also did this in DDR3 and used it the same way - and then address it as array by core?

Or even another idea, you could make 8 sections in your platform, one for each core and then create the variable for each core to use. Then you could have some sort of macro that returns the correct pointer to the variable assigned for each core based on Core ID?

Are we getting any closer to answering your question? If not, maybe you can give more specific example of what is not working out.

Brandy

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Conditional statements in .cfg file