LSU SRCID

Thomas Rakesh

Hi ,

Could anyone please explain about SRCID based LSU interrupts.What does SRCID mean and is there any mapping from SRCID to Corepac number of DSP/ LSU/Shadow Registers.

My application uses only one core.

Thanks in advance,

Thomas

over 12 years ago

0 Ganapathi Dhandapani95 over 12 years ago

TI__Mastermind 28085 points

Hi Thomas,

SRCIDs are assigned to Individual cores in software. Cores can have multiple SRCIDs (16 available), but a given SRCID can only be used by one core. In this way, the cores undestand which interrupt bits they must service. For example, if core 4 is assigned SRCIDs 10 and 11, then ICSR bits 10, 11, 26, and 27 must be routed to core 4 using the ICRR.

If you need more information about SRCID, refer SRIO user guide

http://www.ti.com/lit/sprugw1b

Thanks,

Processors

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LSU SRCID