tci6638 - running .out file without emulator and CCS

Hi,

No need to convert .out file. Please follow below instructions.

1. Boot the Linux in target EVM using NFS.

2. Setup the Network File System and copy the app.out to the file system /home directory.

3. Use MPM command utility to load & run the program on DSP.

Please follow wiki pages to setup.

NFS boot: http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Tools#Loading_and_Running_Linux_Kernel_using_tftp_with_NFS_file_system

MPM Usage: http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Developing_System_Mgmt#Methods_to_load_and_run_ELF_images_using_MPM

Thanks.

Thanks Rajasekaran K for reply

We're using sysbios, not linux. I guess I have to load u-boot.bin and skern.bin files to nand flash to do this but they're in the NOR flash. I need only that u-boot copy my .out file from NAND flash to RAM to start project code every power-on. Can I do that with setting environment variables ?

I read this in the DSP boot loader doc in 3.2.2 Boot Table section "The image to be loaded into the device is converted to a format recognizable by the RBL. This format is called the boot table. Code and data sections are inserted into the boot table automatically by the hex conversion utility."

 First link doesn't work

thanks

Hi Mehmet,

Running Linux Keystone II devices is easy. You shall boot Linux on ARM core then you shall use MPM to reset/load/run on DSP cores.

Please let us know if you have difficulties.

The link updated above. 

Thanks.

Thanks for reply

I've solved the problem with configuring the u-boot environment variables and I converted the .out file to .hex than .bin file. ARM Core-0 runs every power-on after the u-boot initializations.

Now I want ARM Core-0 run the other cores(DSP and ARM cores)

I read ARM Bootloader doc. There is boot sequence to run other cores from Boot master Core.

"When a secondary ARM core is needed, any active core may load code for the
secondary core to the execution address, write the execution address to the boot magic
register, generate an IPC interrupt to the core, and take the core out of reset. The
secondary core will then come out of reset and begin executing the code provided to it."

I downloaded the ARM Core 1 .out file from flash to RAM with ARM Core-0. Then I set  Arm core 1 boot magic address(0x0C5AD004) to _c_int00 address then to generate an IPC interrupt to ARM Core-1, I set ARM Core-1 IPC Generation  Register(0x02620264) bit one to 1. But when I look the 0x02620264, bit-1 is not set. ARM core-1 doesn't work. 

I don't know what is wrong in my steps?

Thanks