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DM365: PLL0 and PLL1 settings for 270Mhz version

Hello,

after working a bit with the 300Mhz version of dm365, now I have to configure the system for 270Mhz. This means reconfiguring PLL0 and PLL1 for this new frequency. One easy way is to work on PLL's pre/post dividers and multiplier, so I can lower the PLL output freq. When divided by 2 (default divider for ARM subsystem) the result is 270Mhz. But this way all other peripherials are forced to work at a lower speed.

What are the settings suggested by TI for the 270Mhz version of DM365? I feel there is a better way to let the arm subsystem work at 270Mhz while preserving the speed of other peripherials (ipipe, resizer, vpss, etc.)

Thanks.