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OMAP L-137 PSC questions

Hi, I am working on OMAP L-137 using SPI slave boot from an external host and have some PSC related questions.

1) Without using the GEL file, after the AIS boot I can see that the default PSC configuration matches the one described in sprug84b on page 84-85, but I see the following difference:

PSC0, peripheral no. 6 (AINTC) is in the Enable state after boot

Is it a bug in the documentation or is it powered on by the D800K001? We are using AISgen utilities on command prompt "hexgen.exe" passing both the DSP and the ARM application.

2) Why the DSP UBL code sets the ARM RAM/ROM PSC to enable even if it is placed in this state by default?

3) What is PSC0, LPSC number 8 (enabled after boot by default)? It is marked as "not used"... Do I need to care about other "unused" peripherals like PSC1 14/15,18/19,22/23,27/30? I would like to know if they are similar to PSC0 13 ("dMax" or PRUSS) that we need to use even if it is not documented on this chip....

 

Thank you.

  • Hi Marco

    For #1 I believe AINTC is indeed enabled by the ROM boot loader (I will re-confirm with the bootloader (D800K001) owner also). From a hardware perspective, by default AINTC is in SwRstDisable state , so the documentation is reflecting this correctly.

    For#2, I would think you could ignore this step in the UBL, ARM RAM/ROM are indeed enabled by default, and you should not have to worry about re-enabling them in a secondary boot loader/ gel function etc.Apart from the software overhead, re-enabling an already enabled module should not have any functional impact on the device.


    #3, PSC0 LPSC8  should be considered as a reserved module and a don't care from a user perspective. It is enabled by default , but clocking this module has very insignificant power draw. Enabling/Disabling this module will not have any other functional impact on the chip, so I would recommend treating it as a don't care and leave it at the default state. Remaining listed PSC1 LPSC# are truly unused and are also don't care from a user perspective.

    Hope this helps.

    Regards

    Mukul

  • Hi Marco

    My response on #1 was incorrect. D800K001 does not enable AINTC and leaves it in its default SwRstDisable state. So it is likely that it is getting enabled in some secondary initialization code , not the rom boot loader.


    Regards

    Mukul

  • Hi Mokul,

    thank you for your reply, but I still not agree with the fact that AINTC is enabled by default: after reset and connecting with JTAG without GEL file intervention, I can see PSC0 MDSTAT6 and MDSTAT7 (AINTC and ARM RAM/ROM) are 0x00001E03, meaning that peripherals are in the enable state. I'm still thinking documentation is not correct. Anyway, as you said, there is no problem if I re-program them by software to transition again to the same state.


    Regards

    Marco


  • Hi Marco

    It turns out that you are indeed correct in your observation. I did some more digging, and apparently changing the default power on reset state of AINTC to "Enable" was a late design change, that we failed to capture in the design specifications/user guide/datasheet etc. 

    So I stand corrected, AINTC does indeed come up as "enabled" by default (its not enabled in the rom boot loader or any secondary software from TI).

    We will get the documentation fixed on this. I apologize if you had to spent any additional time corroborating my original statements on the state of AINTC.

    Regards

    Mukul