Other Parts Discussed in Thread: TMS320C6678
Hi, e2e community!
We have a custom board with TMS320C6678 and FPGA on it. DSP is connected to FPGA with EMIF16 interface for booting and data exchange purposes. Boot flash is connected to FPGA.
If I understand docs correctly, in EMIF16 boot RBL does nothing but places PC at 0x70000000. I've compiled *.out file with CCS and I want to upload it to flash memory at some offset (say 0x600000). And FPGA will fix DSP addresses to point to this offset at boot time.
So what do I need to generate flash file from my *.out file for one core? And what should I do to add images for other cores to this flash file? Does CCS automate this process?
Thanks for your replies,
Yurii
PS. Sorry for such inaccurate questions. I'm an ADI guy and Keystone platform is something new for me.