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6678 pcie clock

Other Parts Discussed in Thread: CDCE62005

hi

if i use 6678 as EP device connect to RC device;i use the pcie clock of RC device as the pcie clock of 6678,

that is to say,6678 and RC device use the same pcie clock from RC device。

in the 6678 code ,for example ,in the iblPCIeWorkaround function or other init,do i need to change the code。

best regards

  • Hi Cherish,

    The clock selection is controlled by the FPGA code.

    ICS557_SEL (PCIE clock pultipleaxor inputs selection: This pin is controlled by the register to select PCIE reference clock from the CDCE62005 or the AMC edge connector. The default is from the CDCE62005).

    Refer the below link:

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/324168/1148585.aspx#1148585

    There are two inputs could be used for the PCIe reference clock based on the technical reference manual of the EVM, one is from the AMC card and another is from the clock generator (CDCE62005) on the board which is 100MHz.

    So no matter the PCIe is configured as RC or EP, there is always a reference clock as 100MHz provided by the EVM itself to the device chip. So two EVM setup could work correctly.

    If we connect our EVM as RC to another EP device (e.g. FPGA), please check if the EP device has its own PCIe reference clock since our EVM does not have the output. And please check if the RC and EP share the same reference clock frequency (100MHz if using EVM clock generator).

    Thanks,