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DDR3 memory device support (MT41J256M16 and MT41K512M16)

Arnaud Maye
Intellectual 400 points
Other Parts Discussed in Thread: TMS320C6678

Gentlemen,

There was a few posts without definitive answers about that. Would any TI employee carefully verify these two parts are supported by the TMS320C6678, we plan on using 4 per board.

Can any non TI developers confirm they have used these parts successfully on their custom designs?

MT41J256M16

MT41K512M16 (Twin Die)

Best Regards,

Arnaud

  • 0
    TI__Mastermind 42545 points

    Hi Arnaud,

    The DDR3 memory interface was designed to operate  with JEDEC compliant DDR3 memory devices and has been tested with a number of devices using our evaluation platforms and verification platforms, but we do not maintain a list of memory components that have been tested with the C6678.  Currently we have not tested the C6678 with Twin Die devices so  I can't tell you whether the MT41K512M16 is a valid choice. 

    Regards, Bill

  • 0 in reply to Bill Taboada
    Intellectual 400 points

    Dear Bill,

    Thank you for your fast answer.

    I am not able to understand if the MT41J256M16 is supported. Can you please let me know, we need to know if we can upgrade our 128M16 to 256M16 or not.

    As far as the 512M16 is concerned, Twin Die is a dual rank configuration on one chip with an extra chip select and clock bus. So let me reformulate the question, have you guy got a dual rank configuration up and running on the TMS320C6678 reliably?

    We are aiming for a redesign of FMC667 so we need an official/definitive answer from TI before we do so!

    Best Regards,

    Arnaud

     

  • 0 in reply to Arnaud Maye
    TI__Mastermind 46460 points

    Arnaud,

    The MT41J256M16 implemented in a single-rank topolgy should be fully supported.  We have seen multiple board designs with this vendor's line of x16 devices.  4 of these devices will provide a 2GB memory in an x64 topology.

    The C6678 (and other KeyStone I devices) support limited topologies as stated in the KeyStone DDR3 Layout Guidelines.  They do not support address mirroring.  This previously prevented dual rank validation since all commodity UDIMMs available during device validation required mirroring support in the controller.  We also do not support non-DIMM, dual-rank layouts since these are difficult to route in a manner that sufficiently controls the signal integrity.

    Availability of affordable twin-die devices is relatively recent.  These should be supported by the KeyStone I DDR3 controller.  However, we do not have an in-house design that supports these devices.  If you have or will create a board that supports twin-die devices, we can work with you to establish the procedure for enabling this dual-rank operation on twin-die devices.

    Tom

     

  • 0 in reply to Tom Johnson 16214
    Intellectual 400 points

    Tom,

    Thank you for your answer. We are now waiting final words from the customer, I will let you know as soon I know more.

    Best Regards,

    Arnaud