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AM3352 Reset

Nikhil Tiwari
Intellectual 575 points

Other Parts Discussed in Thread: AM3352

Hi,

On our board we have a system reset coming as input. This system reset is AND with the NRESPWRON signal of PMIC and given as PORZ to AM3352. I have few doubts -

  1. When the system reset is made low the PMIC will remain in the same operating mode (OPP). Which means all the power supplies will be different from what is the default state of PMIC. In this case will there be any issues when AM3352 boots up?
  2. Does the AM3352 does has any interaction (with PMIC) when the reset is applied other than making the NRESETIN_OUT low.
  3. Also when the internal watchdog reset is asserted for AM3352 is it reflected on the NRESETIN_OUT pins also?

Thanks & regards,

Nikhil

  • 0
    TI__Guru**** 393215 points

    Hi Nikhil,

    1. Depending on what the OPP is the processor may draw some more current while reinitializing. Note that OPP frequencies given in the datasheet are the maximum possible frequencies for a given OPP, lower frequencies will also work. If in doubt it would be best to reset the PMIC too.

    2. Applying NRESPWRON while the system is running has one hidden implication - you must be sure that the SYSBOOT pins will be latched correctly. This may be prevented if some external device is driving some of these pins.

    3. Yes, internal WDT reset is propagated on the NRESETIN_OUT pin.

  • 0 in reply to Biser Gatchev-XID
    Intellectual 575 points

    Hi Biser,

    Thanks for your response. In our system the the SYSBOOT pins are pulled high to VMMC supply so the PMIC will take care. And GPMC address and LCD data lines will be output from processor so no other device can drive those SYSBOOT lines if I am correct. 

    Regards,

    Nikhil