• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 432 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM814x PCIe EP mode BARn write notification?

Stephan
Prodigy 110 points

Hi All,

I have configured an DM8148 as PCIe endpoint. The RC (Mac connected via Thunderbolt <-> PCIe adapter) successfully enumerates the PCIe device and loads the driver for it. Now on the endpoint I would like to get notified whenever the RC writes to BAR2/BAR4, preferably via an interrupt.

Unfortunately the PCIe module on the 814x doesn't seem to support firing an interrupt when an RC makes changes. Did I overlook something? Or is there a different way to achieve what I need? Or is the only option to poll the BAR memory and check for changes?

Thanks,

Stephan

  • 0
    TI__Guru**** 170625 points

    Stephan,

    I can provide you the below pointers:

    http://processors.wiki.ti.com/index.php/TI81XX_PCIe_FAQs

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PCI_Express_Endpoint_Driver_User_Guide

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PCI_Express_Endpoint_Boot_Driver_User_Guide

    http://processors.wiki.ti.com/index.php/DM81xx_AM38xx_PCI_Express_Root_Complex_Driver_User_Guide

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_U-Boot_PCIe_Boot_User_Guide

    DM814x TRM, chapter 19 PCIe, section 19.2.10 Interrupt Support

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 110 points

    Well, the TRM section 19.2.10 mentions PCIe legacy interrupts, MSI, Error and PM events as interrupt sources. I do know that I could trigger a local interrupt from the RC side by issuing an MSI/legacy interrupt. But that's not what I am looking for.

    What I am looking for is a way to trigger a local interrupt when the local BARn memory gets changed though an incoming memory write TLP.

    If you look at the way the boot over PCIe is implemented in U-Boot, you'll notice that this implementation uses polling of a single well known address. This address is filled by the RC with a magic value after the firmware has been uploaded.

    This is reasonable for the boot process but if you have an endpoint with a BAR size of maybe 4kB, you'd have to do a 4kB memcmp on every poll to be able to react to any change requested by the RC.

    Regards,

    Stephan

  • 0 in reply to Stephan
    TI__Guru**** 170625 points

    Stephan,

    Stephan said:

    Well, the TRM section 19.2.10 mentions PCIe legacy interrupts, MSI, Error and PM events as interrupt sources. I do know that I could trigger a local interrupt from the RC side by issuing an MSI/legacy interrupt. But that's not what I am looking for.

    What I am looking for is a way to trigger a local interrupt when the local BARn memory gets changed though an incoming memory write TLP.

    Reading the PCIe TRM, I see that the PCIe hardware does not have such feature/capability.

    Best Regards,
    Pavel