DVO2 output in IPNC RDK 3.8.0

Sunny Shukla

Prodigy 220 points

Other Parts Discussed in Thread: DM385, TVP5158

Dear ti members,

me and my team members are stuck up in tying DVO2 with HDMI .

We followed the post :

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/236635.aspx?pi199607=1

But in the above post as Brijesh Jadav Suggested to Thomas Lo , we did the same thing in our ipnc rdk still its giving assertion i.e. Assertion @ Line: 706 in link_m3vpss/system/system_dctrl.c: retVal == FVID2_SOK : failed !!!

What we found out that this assertion is taking place in following lines of code in system_dctrl.c :

retVal = FVID2_control(
                 gSystem_objVpss.fvidDisplayCtrl,
                 IOCTL_VPS_DCTRL_SET_CONFIG,
                 &gSystem_objVpss.displayCtrlCfg,
                 NULL);
    //GT_assert( GT_DEFAULT_MASK, retVal==FVID2_SOK);
    UTILS_assert(retVal == FVID2_SOK);

As we dig futher up we found out that this above code is calling the below lines of code from ti_tools/hdvpss_01_00_01_37/packages/ti/psp/vps/drivers/display/src/vps_dctrl.c file

retVal = dcSetConfig(dcCtrlInfo, (Vps_DcConfig *)cmdArgs);

and the dcSetConfig function in turns execute the following line of code (in same file)

retVal = dcConfigVencMode(&(dcConfig->vencInfo));

Further the dcConfigVencMode fucntion is in returing -1 i.e. FVID2_EFAIL .

In conclusion we are not able to configure the Venc/s and start it .

ARE WE MISSING SOMETHING ??

IS THIS IS NOT THE WAY TO TIE DVO2 AND HDMI ??

Please help us out .

P.S. : Please refer to the link below which we followed (same link i posted above)

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/236635.aspx?pi199607=1

Thanks.

over 12 years ago

0 Brijesh Jadav over 12 years ago

TI__Guru**** 504415 points

Hi Sunny,

Please provide your display controller tree to check why dcConfigVencMode is failing.

Rgds,

Brijesh

0 Sunny Shukla over 12 years ago in reply to Brijesh Jadav

Prodigy 220 points

Hi Brijesh,

First of all ,changes done in ipnc_rdk/ipnc_mcfw/mcfw/src_linux/mcfw_api/ti_vdis.c

#if defined (TI_8107_BUILD)
//Original Code
/*
pContext->tiedDevicesMask = VDIS_VENC_HDMI | VDIS_VENC_HDCOMP;
pContext->deviceParams[VDIS_DEV_HDCOMP].resolution = pContext->deviceParams[VDIS_DEV_HDMI].resolution;
*/

//Modified Code
pContext->tiedDevicesMask = VDIS_VENC_DVO2 | VDIS_VENC_HDMI;
pContext->deviceParams[VDIS_DEV_HDMI].resolution = pContext->deviceParams[VDIS_DEV_DVO2].resolution;
#endif

We made the above changes to tie DVO2 with HDMI

We then followed your suggestion to Thomas Lo and made the following changes in

File :- ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c

Changes :-

/* To tie DVO2 and HDCOMP together refer following Mesh */
Vps_DcConfig gSystem_dctrlTriDisplayConfigHdmiDvo2 = {
    /* Use Case */
    VPS_DC_USERSETTINGS,
    /* Edge information */
    {
        {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX},
        {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
        {VPS_DC_CIG_CONSTRAINED_OUTPUT, VPS_DC_HDCOMP_BLEND},
        {VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX},
        {VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT},
        {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},
        {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDMI_BLEND},
        {VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX},
        {VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND},
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND},
        {VPS_DC_GRPX1_INPUT_PATH, VPS_DC_HDCOMP_BLEND},
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND}
    },
    /* num of edges */
    12,
    /* VENC information */
    {
     /* Mode information */
     {
      {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}},
      {VPS_DC_VENC_HDCOMP, {FVID2_STD_1080P_60}},
      {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}},
      {VPS_DC_VENC_SD, {FVID2_STD_NTSC}}
     },
     /* Tied VENC bit mask */
     (VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDMI),
     /* Number of VENCs */
     4u
    }
};

File :- ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c

Function :- System_displayCtrlInit

Changes :-

#if defined(TI_814X_BUILD) || defined (TI_8107_BUILD)
    //Original Code
    /*    dctrlTriDisplayConfig = &(gSystem_dctrlTriDisplayConfig);
    dctrlTriDisplayConfig->vencInfo.tiedVencs = pPrm->tiedDevicesMask;
    */

   //Modified Code
    if(pPrm->tiedDevicesMask == (VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDMI))
    {
        dctrlTriDisplayConfig = &(gSystem_dctrlTriDisplayConfigHdmiDvo2);
        dctrlTriDisplayConfig->vencInfo.tiedVencs = pPrm->tiedDevicesMask;
    }
    else
    {
        dctrlTriDisplayConfig = &(gSystem_dctrlTriDisplayConfig);
        dctrlTriDisplayConfig->vencInfo.tiedVencs = pPrm->tiedDevicesMask;
    }
#endif

------------------------------------------------------------------------------------------------------------------------------------------------------

Display Control Tree

[host] Before System_linkControl SYSTEM_M3VPSS_CMD_GET_DISPLAYCTRL_INIT
[m3vpss ] tiedVencs VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] VPS_DCTRL_INST_0
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_DVO2
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDMI
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_SD
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDCOMP
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_CLK_SRC VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] HDCOMPCLK
[m3vpss ] DBG: cnt 0
[m3vpss ] DBG: vencs is 0
[m3vpss ] DBG: vencInfo->modeInfo[0].vencId = 1
[m3vpss ] DBG: cnt 1
[m3vpss ] DBG: vencs is 1
[m3vpss ] DBG: vencInfo->modeInfo[1].vencId = 2
[m3vpss ] DBG: cnt 2
[m3vpss ] DBG: vencs is 3
[m3vpss ] DBG: vencInfo->modeInfo[2].vencId = 4
[m3vpss ] DBG: cnt 3
[m3vpss ] DBG: vencs is 7
[m3vpss ] DBG: vencInfo->modeInfo[3].vencId = 8
[m3vpss ] DBG: at line 2302 retval is -4
[m3vpss ] DBG: at line 2321 retval is 0
[m3vpss ] DBG: at line 2333 retval is 0
[m3vpss ] DBG: at line 2346 retval is -1
[m3vpss ] DBG: dcConfigVencMode is -1
[m3vpss ] DBG: retVal = -1
[m3vpss ] 6419: Assertion @ Line: 715 in links_m3vpss/system/system_dctrl.c: retVal == FVID2_SOK : failed !!!

---------------------------------------------------------------------------------------------------------------------------------------------------------

We put those prints in dcSetConfig and in dcConfigVencMode function/s to see from where its failing

The two (failing) case as shown above (in red) is descibe as follows :

1) [m3vpss ] DBG: at line 2302 retval is -4

if (TRUE == outputNode->isVencStarted)
                {
                    if ((FVID2_STD_CUSTOM != modeInfo->mInfo.standard) &&
                        (outputNode->modeInfo.mInfo.standard ==
                                modeInfo->mInfo.standard))
                    {
                        /* Since mode is same, there is no need to set
                           it again */
                        continue;
                    }
                    else
                    {
                        /* Mode is changed and VENC is running, first
                           disable VENC*/
                        retVal = FVID2_EDEVICE_INUSE;
                        Vps_printf("DBG: at line %d retval is %d\n",__LINE__,retVal);
                    }
                }

2) [m3vpss ] DBG: at line 2346 retval is -1

/* Call the setMode of the Venc in order to make sure
                       that mode is correct */
                    retVal = outputNode->setMode(
                                            outputNode->vencHandle,
                                            modeInfo);
                    Vps_printf("DBG: at line %d retval is %d\n",__LINE__,retVal);

--------------------------------------------------------------------------------------------------------------------------------------------------------

IS SOMETHING WE ARE MISSING ??

Thanks .

0 Brijesh Jadav over 12 years ago in reply to Sunny Shukla

TI__Guru**** 504415 points

Hi Sunny,

ok, the problem is you are trying to change the mode of the venc which is already running, this is not allowed, you need to stop that venc first and then you can change the mode.

Please use sysfs entries to stop the venc first and then, you should be able set the tie HDMI and DVO2.

Display Controller Tree seems to be correct.

Regards,

Brijesh

0 Sunny Shukla over 12 years ago in reply to Brijesh Jadav

Prodigy 220 points

Hi Brijesh,

As u suggested to stop the vencs first, i put the following lines of code in ipnc_rdk/ipnc_mcfw/mcfw/src_linux/mcfw_api/ti_vdis.c file

Changes :-

#if defined (TI_8107_BUILD)
//Original Code

/*
pContext->tiedDevicesMask = VDIS_VENC_HDMI | VDIS_VENC_HDCOMP;
pContext->deviceParams[VDIS_DEV_HDCOMP].resolution = pContext->deviceParams[VDIS_DEV_HDMI].resolution;
*/

//Modified Code
    Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETVENC, VDIS_SYSFS_DVO2, VDIS_OFF);
    Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETVENC, VDIS_SYSFS_HDMI, VDIS_OFF);
    pContext->tiedDevicesMask = VDIS_VENC_DVO2 | VDIS_VENC_HDMI;
    pContext->deviceParams[VDIS_DEV_HDMI].resolution = pContext->deviceParams[VDIS_DEV_DVO2].resolution;
#endif

-----------------------------------------------------------------------------------------------------------------------------------------------------

I am disabling the HDMI and VDO2 display by above two line (in bold).

-------------------------------------------------------------------------------------------------------------------------------------------------------

Display Control Tree

[host] Before System_linkControl SYSTEM_M3VPSS_CMD_GET_DISPLAYCTRL_INIT
[m3vpss ] tiedVencs VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] VPS_DCTRL_INST_0
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_DVO2
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDMI
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_SD
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDCOMP
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_CLK_SRC VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] HDCOMPCLK
[m3vpss ] DBG: cnt 0
[m3vpss ] DBG: vencs is 0
[m3vpss ] DBG: vencInfo->modeInfo[0].vencId = 1
[m3vpss ] DBG: cnt 1
[m3vpss ] DBG: vencs is 1
[m3vpss ] DBG: vencInfo->modeInfo[1].vencId = 2
[m3vpss ] DBG: cnt 2
[m3vpss ] DBG: vencs is 3
[m3vpss ] DBG: vencInfo->modeInfo[2].vencId = 4
[m3vpss ] DBG: cnt 3
[m3vpss ] DBG: vencs is 7
[m3vpss ] DBG: vencInfo->modeInfo[3].vencId = 8
[m3vpss ] DBG: at line 2321 retval is 0
[m3vpss ] DBG: at line 2333 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: at line 2356 retval is 0
[m3vpss ] DBG: at line 2395 retval is 0
[m3vpss ] DBG: at line 2405 retval is 0
[m3vpss ] DBG: at line 2412 retval is 0
[m3vpss ] DBG: at line 2321 retval is 0
[m3vpss ] DBG: at line 2333 retval is 0
[m3vpss ] DBG: at line 2346 retval is -1
[m3vpss ] DBG: dcConfigVencMode is -1
[m3vpss ] DBG: retVal = -1
[m3vpss ] 6637: Assertion @ Line: 715 in links_m3vpss/system/system_dctrl.c: retVal == FVID2_SOK : failed !!!

-------------------------------------------------------------------------------------------------------------------------------------------------------

The retVal is setting to -1 FVID2_EFAIL as shown above (in red) , the lines of code where the error is occurring is as follow :

File : ti_tools/hdvpss_01_00_01_37/packages/ti/psp/vps/drivers/display/src/vps_dctrl.c

Function : dcConfigVencMode

Code :

if (FVID2_SOK == retVal)
                {
                    /* Call the setMode of the Venc in order to make sure
                       that mode is correct */
                    retVal = outputNode->setMode(
                                            outputNode->vencHandle,
                                            modeInfo);

                    Vps_printf("WAVU_DBG: at line %d retval is %d\n",__LINE__,retVal);


                    /* Mode is set in the VENC, so get the mode information */
                    if (FVID2_SOK == retVal)
                    {
                        retVal = outputNode->getMode(
                                            outputNode->vencHandle,
                                            &outputNode->modeInfo);

                        Vps_printf("WAVU_DBG: at line %d retval is %d\n",__LINE__,retVal);

                    }
                }

---------------------------------------------------------------------------------------------------------------------------------------------------

The retVal is set to -1 in outputNode->setMode

----------------------------------------------------------------------------------------------------------------------------------------------------

IS I AM STOPPING VENCs PROPERLY ??

IS I AM MISSING SOMETHING ????

Thanks.

0 Brijesh Jadav over 12 years ago in reply to Sunny Shukla

TI__Guru**** 504415 points

Sunny,

This could fail only if the passes standard mode (non custom) is not supported. From the tree, it looks like you are passing the 10080p60, which is supported, but somehow it looks like this variable is curropted. Then it could fail. Can you go inside this function and see where exactly it is failing and what is the value of the standard variable of the minfo structure?

Rgds,

Brijesh

0 Sunny Shukla over 12 years ago in reply to Brijesh Jadav

Prodigy 220 points

Hi Brijesh,

Just to avoid any clashes with changes done by us (as per our requirement) with this issue of tying HDMI with DVO2. We build a new (fresh) package of DM385 IPNC RDK 3.8.0 and include only those changes which are needed for tying HDMI and DVO2 . Still we are facing the same assertion.

Hence we put more prints (as below) to check what is going wrong while configuring and starting the vencs.

What we observer is that in file ti_tools/hdvpss_01_00_01_37/packages/ti/psp/vps/drivers/display/src/vps_dctrl.c , function dcConfigVencMode is called by two functions (in same file) i.e. dcSetVencMode and dcSetConfig which are called by two IOCTL calls namely IOCTL_VPS_DCTRL_SET_VENC_MODE and IOCTL_VPS_DCTRL_SET_CONFIG . What we observed is that vencs setting in former call is OK but in latter call the settings is cleared.Shown in display control tree as follows.

[m3ps ] DBG: dcConfigVencMode is called from dcSetVencMode
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vDMA: Module install successful, device major num = 248
pss ] DBG: DRV: Module install successful
vencInfo
[m3vpDRV: Module built on May 5 2014 18:06:33
ss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 3
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps HDMI W1 rev 4.0
= 60
[m3vpss ]HDMI CEC Spec version 1.2
DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 3
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2410 retval is 0
[m3vpss ] DBG: at line 2420 retval is 0
[m3vpss ] DBG: at line 2459 retval is 0
[m3vpss ] DBG: at line 2469 retval is 0
[m3vpss ] DBG: at line 2476 retval is 0
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 2
[m3vpss ] DBG: mode = 2
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 2
[m3vpss ] DBG: mode = 2
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2410 retval is 0
[m3vpss ] DBG: at line 2420 retval is 0
[m3vpss ] DBG: at line 2459 retval is 0
[m3vpss ] DBG: at line 2469 retval is 0
[m3vpss ] DBG: at line 2476 retval is 0
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 3
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncI2C No Ack
Len = 44
[m3vp
HDMI failed to read E-EDID
ss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 3
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2410 retval is 0
[m3vpss ] DBG: at line 2420 retval is 0
[m3vpss ] DBG: at line 2459 retval is 0
[m3vpss ] DBG: at line 2469 retval is 0
[m3vpss ] DBG: at line 2476 retval is 0
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 8
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 0
[m3vpss ] DBG: width = 720
[m3vpss ] DBG: height = 480
[m3vpss ] DBG: scanFormat = 0
[m3vpss ] DBG: pixelClock = 54000
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 12
[m3vpss ] DBG: hBackPorch = 68
[m3vpss ] DBG: hSyncLen = 64
[m3vpss ] DBG: vFrontPorch = 5
[m3vpss ] DBG: vBackPorch = 41
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 0
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 8
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 0
[m3vpss ] DBG: width = 720
[m3vpss ] DBG: height = 480
[m3vpss ] DBG: scanFormat = 0
[m3vpss ] DBG: pixelClock = 54000
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 12
[m3vpss ] DBG: hBackPorch = 68
[m3vpss ] DBG: hSyncLen = 64
[m3vpss ] DBG: vFrontPorch = 5
[m3vpss ] DBG: vBackPorch = 41
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2410 retval is 0
[m3vpss ] DBG: at line 2420 retval is 0
[m3vpss ] DBG: at line 2459 retval is 0
[m3vpss ] DBG: at line 2476 retval is 0
[m3vpss ] DBG: retVal of dcConfigVencMode (called form dcSetVencMode) is 0

[host]

[host] ORG 0x46c00524: 0

[host] NEW 0x46c00524: 2

[host]

[host] Application Start Completed

[host] 0: SYSTEM: System Common Init in progress !!!

[host] 0: SYSTEM: IPC init in progress !!!

[host] 10: SYSTEM: CPU [DSP] is NOT available on this platform !!!

[host] 11: SYSTEM: CPU [VIDEO-M3] syslink proc ID is [0] !!!

[host] 11: SYSTEM: CPU [VPSS-M3] syslink proc ID is [1] !!!

[host] 11: SYSTEM: CPU [HOST] syslink proc ID is [2] !!!

[host] 11: SYSTEM: Opening MsgQ Heap [IPC_MSGQ_MSG_HEAP] ...

[host] 12: SYSTEM: Creating MsgQ [HOST_MSGQ] ...

[host] 14: SYSTEM: Creating MsgQ [HOSTDMA: ChannelID allocated:4
_ACK_MSGQ] ...
DMA: ChannelID allocated:5

[host] 15: SYSTEM: Opening MsgQ [VIDEO-M3_MSGQ] ...

[host] 16: SYSTEM: Opening MsgQ [VPSS-M3_MSGQ] ...

[host] 17: SYSTEM: Notify register to [VIDEO-M3] line 0, event 12 ...

[host] 17: SYSTEM: Notify register to [VPSS-M3] line 0, event 12 ...

[host] 18: SYSTEM: IPC init DONE !!!

[host] 19: SYSTEM: Creating ListMP [HOST_IPC_OUT_29] in region 0 ...

[host] 21: SYSTEM: Creating ListMP [HOST_IPC_IN_29] in region 0 ...

[host] 23: SYSTEM: ListElem Shared Addr = 0x40cfe580

[host] 24: SYSTEM: Creating ListMP [HOST_IPC_OUT_30] in region 0 ...

[host] 26: SYSTEM: Creating ListMP [HOST_IPC_IN_30] in region 0 ...

[host] 27: SYSTEM: ListElem Shared Addr = 0x40d18200

[host] 29: SYSTEM: Creating ListMP [HOST_IPC_OUT_24] in region 0 ...

[host] 31: SYSTEM: Creating ListMP [HOST_IPC_IN_24] in region 0 ...

[host] 32: SYSTEM: ListElem Shared Addr = 0x40d31e80

[host] 33: SYSTEM: Creating ListMP [HOST_IPC_OUT_25] in region 0 ...

[host] 35: SYSTEM: Creating ListMP [HOST_IPC_IN_25] in region 0 ...

[host] 37: SYSTEM: ListElem Shared Addr = 0x40d51880

[host] 38: SYSTEM: Creating ListMP [HOST_IPC_OUT_26] in region 0 ...

[host] 40: SYSTEM: Creating ListMP [HOST_IPC_IN_26] in region 0 ...

[host] 41: SYSTEM: ListElem Shared Addr = 0x40d71280

[host] 42: SYSTEM: System Common Init Done !!!

[host] Vsys_allocBuf - addr = 0x4c73d000,size = 65011712
##########pInfo->totalsize 63897600

[host] MemMng_memcpy_open:OSA_dmaOpen passed with ch id = 4

[host] CacheMng_MemCpy_open:OSA_dmaOpen passed with ch id = 5

[host] MCFW_IPCFRAMES:App_ipcFramesSendRecvFxn:Entered...
[host] Vsys_allocBuf - addr = 0x40b71000,size = 33603

[host] DCC buffer allocated for size 33603

[host] DCC Default File Intialization Done

[host] Before System_linkControl SYSTEM_M3VPSS_CMD_GET_DISPLAYCTRL_INIT
[m3vpss ] DBG: line 351 TiedDevice Mask 5
[m3vpss ] tiedVencs VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] VPS_DCTRL_INST_0
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_DVO2
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDMI
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_SD
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDCOMP
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_CLK_SRC VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] HDCOMPCLK
[m3vpss ] DBG: cnt 0
[m3vpss ] DBG: vencs is 0
[m3vpss ] DBG: vencInfo->modeInfo[0].vencId = 1
[m3vpss ] DBG: cnt 1
[m3vpss ] DBG: vencs is 1
[m3vpss ] DBG: vencInfo->modeInfo[1].vencId = 2
[m3vpss ] DBG: cnt 2
[m3vpss ] DBG: vencs is 3
[m3vpss ] DBG: vencInfo->modeInfo[2].vencId = 4
[m3vpss ] DBG: cnt 3
[m3vpss ] DBG: vencs is 7
[m3vpss ] DBG: vencInfo->modeInfo[3].vencId = 8
[m3vpss ] DBG: dcConfigVencMode is called from dcSetConfig
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 0
[m3vpss ] DBG: height = 0
[m3vpss ] DBG: scanFormat = 0
[m3vpss ] DBG: pixelClock = 0
[m3vpss ] DBG: fps = 0
[m3vpss ] DBG: hFrontPorch = 0
[m3vpss ] DBG: hBackPorch = 0
[m3vpss ] DBG: hSyncLen = 0
[m3vpss ] DBG: vFrontPorch = 0
[m3vpss ] DBG: vBackPorch = 0
[m3vpss ] DBG: vSyncLen =0
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 0
[m3vpss ] DBG: height = 0
[m3vpss ] DBG: scanFormat = 0
[m3vpss ] DBG: pixelClock = 0
[m3vpss ] DBG: fps = 0
[m3vpss ] DBG: hFrontPorch = 0
[m3vpss ] DBG: hBackPorch = 0
[m3vpss ] DBG: hSyncLen = 0
[m3vpss ] DBG: vFrontPorch = 0
[m3vpss ] DBG: vBackPorch = 0
[m3vpss ] DBG: vSyncLen = 0
[m3vpss ] DBG: at line 2410 retval is 0
[m3vpss ] DBG: at line 2420 retval is 0
[m3vpss ] DBG: at line 2459 retval is 0
[m3vpss ] DBG: at line 2469 retval is 0
[m3vpss ] DBG: at line 2476 retval is 0
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 0
[m3vpss ] DBG: width = 0
[m3vpss ] DBG: height = 0
[m3vpss ] DBG: scanFormat = 0
[m3vpss ] DBG: pixelClock = 0
[m3vpss ] DBG: fps = 0
[m3vpss ] DBG: hFrontPorch = 0
[m3vpss ] DBG: hBackPorch = 0
[m3vpss ] DBG: hSyncLen = 0
[m3vpss ] DBG: vFrontPorch = 0
[m3vpss ] DBG: vBackPorch = 0
[m3vpss ] DBG: vSyncLen =0
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 0
[m3vpss ] DBG: width = 0
[m3vpss ] DBG: height = 0
[m3vpss ] DBG: scanFormat = 0
[m3vpss ] DBG: pixelClock = 0
[m3vpss ] DBG: fps = 0
[m3vpss ] DBG: hFrontPorch = 0
[m3vpss ] DBG: hBackPorch = 0
[m3vpss ] DBG: hSyncLen = 0
[m3vpss ] DBG: vFrontPorch = 0
[m3vpss ] DBG: vBackPorch = 0
[m3vpss ] DBG: vSyncLen = 0
[m3vpss ] DBG: at line 2410 retval is -1
[m3vpss ] DBG: retVal of dcConfigVencMode is -1
[m3vpss ] DBG: retVal = -1
[m3vpss ] 2468: Assertion @ Line: 717 in links_m3vpss/system/system_dctrl.c: retVal == FVID2_SOK : failed !!!

------------------------------------------------------------------------------------------------------------------------------------------------------

Hence we thought of trying to hard code the mInfo params in ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c file as follows

/* To tie DVO2 and HDCOMP together refer following Mesh */
Vps_DcConfig gSystem_dctrlTriDisplayConfigHdmiDvo2 = {
    /* Use Case */
    VPS_DC_USERSETTINGS,
    /* Edge information */
    {
        {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX},
        {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
        {VPS_DC_CIG_CONSTRAINED_OUTPUT, VPS_DC_HDCOMP_BLEND},
        {VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX},
        {VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT},
        {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},
        {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDMI_BLEND},
        {VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX},
        {VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND},
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND},
        {VPS_DC_GRPX1_INPUT_PATH, VPS_DC_HDCOMP_BLEND},
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND}
    },
    /* num of edges */
    12,
    /* VENC information */
    {
     /* Mode information */
     {
     /*
      {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}},
      {VPS_DC_VENC_HDCOMP, {FVID2_STD_1080P_60}},
      {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}},
      {VPS_DC_VENC_SD, {FVID2_STD_NTSC}}
      */
      {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60,1920,1080,1,148500,60,88,148,44,4,36,5}},
      {VPS_DC_VENC_HDCOMP, {FVID2_STD_1080P_60,1920,1080,1,148500,60,88,148,44,4,36,5}},
      {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60,1920,1080,1,148500,60,88,148,44,4,36,5}},
      {VPS_DC_VENC_SD, {FVID2_STD_NTSC,720,480,0,54000,60,12,68,64,5,41,5}}
     },
     /* Tied VENC bit mask */
     (VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDMI),
     /* Number of VENCs [Original Value is 4u]*/
     4u
    }
};

---------------------------------------------------------------------------------------------------------------------------------------------------

posting only those Display tree content which is affected due to above change

---------------------------------------------------------------------------------------------------------------------------------------------------

[m3vpss ] DBG: line 357 TiedDevice Mask 5
[m3vpss ] tiedVencs VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] VPS_DCTRL_INST_0
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_DVO2
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDMI
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_SD
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDCOMP
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_CLK_SRC VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] HDCOMPCLK
[m3vpss ] DBG: cnt 0
[m3vpss ] DBG: vencs is 0
[m3vpss ] DBG: vencInfo->modeInfo[0].vencId = 1
[m3vpss ] DBG: cnt 1
[m3vpss ] DBG: vencs is 1
[m3vpss ] DBG: vencInfo->modeInfo[1].vencId = 2
[m3vpss ] DBG: cnt 2
[m3vpss ] DBG: vencs is 3
[m3vpss ] DBG: vencInfo->modeInfo[2].vencId = 4
[m3vpss ] DBG: cnt 3
[m3vpss ] DBG: vencs is 7
[m3vpss ] DBG: vencInfo->modeInfo[3].vencId = 8
[m3vpss ] DBG: dcConfigVencMode is called from dcSetConfig
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2410 retval is 0
[m3vpss ] DBG: at line 2420 retval is 0
[m3vpss ] DBG: at line 2459 retval is 0
[m3vpss ] DBG: at line 2469 retval is 0
[m3vpss ] DBG: at line 2476 retval is 0
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 0
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 0
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2410 retval is -1
[m3vpss ] DBG: retVal of dcConfigVencMode is -1
[m3vpss ] DBG: retVal = -1
[m3vpss ] 2273: Assertion @ Line: 723 in links_m3vpss/system/system_dctrl.c: retVal == FVID2_SOK : failed !!!

-------------------------------------------------------------------------------------------------------------------------------------------------------

What we found out is that , the standard (in red) member of mInfo is set to 0 i.e. FVID2_STD_NTSC instead of FVID2_STD_1080P_60

-------------------------------------------------------------------------------------------------------------------------------------------------------

Hence we hard coded the mInfo in ti_tools/hdvpss_01_00_01_37/packages/ti/psp/vps/drivers/display/src/vps_dctrl.c file in dcConfigVencMode function above outputNode->setMode call as below

-------------------------------------------------------------------------------------------------------------------------------------------------------

if (FVID2_SOK == retVal)
{

   if(modeInfo->vencId == 8u)
   {
       modeInfo->mInfo.standard = 0;
       modeInfo->mInfo.width = 720;
       modeInfo->mInfo.height = 480;
       modeInfo->mInfo.scanFormat = 0;
       modeInfo->mInfo.pixelClock = 54000;
       modeInfo->mInfo.fps = 60;
       modeInfo->mInfo.hFrontPorch = 12;
       modeInfo->mInfo.hBackPorch = 68;
       modeInfo->mInfo.hSyncLen = 64;
       modeInfo->mInfo.vFrontPorch = 5;
       modeInfo->mInfo.vBackPorch = 41;
       modeInfo->mInfo.vSyncLen = 5;
   }
   else
   {
       modeInfo->mInfo.standard = 13;
       modeInfo->mInfo.width = 1920;
       modeInfo->mInfo.height = 1080;
       modeInfo->mInfo.scanFormat = 1;
       modeInfo->mInfo.pixelClock = 148500;
       modeInfo->mInfo.fps = 60;
       modeInfo->mInfo.hFrontPorch = 88;
       modeInfo->mInfo.hBackPorch = 148;
       modeInfo->mInfo.hSyncLen = 44;
       modeInfo->mInfo.vFrontPorch = 4;
       modeInfo->mInfo.vBackPorch = 36;
       modeInfo->mInfo.vSyncLen = 5;
   }

   Vps_printf("DBG: Before outputNode->setMode called \n");
   Vps_printf("DBG: vencInfo\n");
   Vps_printf("DBG: tiedVencs = %u\n",vencInfo->tiedVencs);
   Vps_printf("DBG: numVencs = %u\n",vencInfo->numVencs);
   Vps_printf("DBG: vencInfo >> modeInfo\n");
   Vps_printf("DBG: vencId = %u\n",modeInfo->vencId);
   Vps_printf("DBG: mode = %u\n",modeInfo->mode);
   Vps_printf("DBG: isVencRunning = %u\n",modeInfo->isVencRunning);
   Vps_printf("DBG: numInPath = %u\n",modeInfo->numInPath);
   Vps_printf("DBG: vencInfo >> modeInfo >> mInfo \n");
   Vps_printf("DBG: standard = %u\n",modeInfo->mInfo.standard);
   Vps_printf("DBG: width = %u\n",modeInfo->mInfo.width);
   Vps_printf("DBG: height = %u\n",modeInfo->mInfo.height);
   Vps_printf("DBG: scanFormat = %u\n",modeInfo->mInfo.scanFormat);
   Vps_printf("DBG: pixelClock = %u\n",modeInfo->mInfo.pixelClock);
   Vps_printf("DBG: fps = %u\n",modeInfo->mInfo.fps);
   Vps_printf("DBG: hFrontPorch = %u\n",modeInfo->mInfo.hFrontPorch);
   Vps_printf("DBG: hBackPorch = %u\n",modeInfo->mInfo.hBackPorch);
   Vps_printf("DBG: hSyncLen = %u\n",modeInfo->mInfo.hSyncLen);
   Vps_printf("DBG: vFrontPorch = %u\n",modeInfo->mInfo.vFrontPorch);
   Vps_printf("DBG: vBackPorch = %u\n",modeInfo->mInfo.vBackPorch);
   Vps_printf("DBG: vSyncLen =%u\n",modeInfo->mInfo.vSyncLen);

   /* Call the setMode of the Venc in order to make sure
   that mode is correct */
   retVal = outputNode->setMode(outputNode->vencHandle,modeInfo);

   Vps_printf("DBG: After outputNode->setMode called \n");
   Vps_printf("DBG: vencInfo\n");
   Vps_printf("DBG: tiedVencs = %u\n",vencInfo->tiedVencs);
   Vps_printf("DBG: numVencs = %u\n",vencInfo->numVencs);
   Vps_printf("DBG: vencInfo >> modeInfo\n");
   Vps_printf("DBG: vencId = %u\n",modeInfo->vencId);
   Vps_printf("DBG: mode = %u\n",modeInfo->mode);
   Vps_printf("DBG: isVencRunning = %u\n",modeInfo->isVencRunning);
   Vps_printf("DBG: numInPath = %u\n",modeInfo->numInPath);
   Vps_printf("DBG: vencInfo >> modeInfo >> mInfo \n");
   Vps_printf("DBG: standard = %u\n",modeInfo->mInfo.standard);
   Vps_printf("DBG: width = %u\n",modeInfo->mInfo.width);
   Vps_printf("DBG: height = %u\n",modeInfo->mInfo.height);
   Vps_printf("DBG: scanFormat = %u\n",modeInfo->mInfo.scanFormat);
   Vps_printf("DBG: pixelClock = %u\n",modeInfo->mInfo.pixelClock);
   Vps_printf("DBG: fps = %u\n",modeInfo->mInfo.fps);
   Vps_printf("DBG: hFrontPorch = %u\n",modeInfo->mInfo.hFrontPorch);
   Vps_printf("DBG: hBackPorch = %u\n",modeInfo->mInfo.hBackPorch);
   Vps_printf("DBG: hSyncLen = %u\n",modeInfo->mInfo.hSyncLen);
   Vps_printf("DBG: vFrontPorch = %u\n",modeInfo->mInfo.vFrontPorch);
   Vps_printf("DBG: vBackPorch = %u\n",modeInfo->mInfo.vBackPorch);
   Vps_printf("DBG: vSyncLen = %u\n",modeInfo->mInfo.vSyncLen);

   Vps_printf("DBG: at line %d retval is %d\n",__LINE__,retVal);

   /* Mode is set in the VENC, so get the mode information */
   if (FVID2_SOK == retVal)
   {
       retVal = outputNode->getMode(outputNode->vencHandle,&outputNode->modeInfo);
       Vps_printf("DBG: at line %d retval is %d\n",__LINE__,retVal);

   }
}

----------------------------------------------------------------------------------------------------------------------------------------------------

This above change the display control tree as below (only positing the affected portion)

----------------------------------------------------------------------------------------------------------------------------------------------------

[host] Before System_linkControl SYSTEM_M3VPSS_CMD_GET_DISPLAYCTRL_INIT
[m3vpss ] DBG: line 357 TiedDevice Mask 5
[m3vpss ] tiedVencs VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] VPS_DCTRL_INST_0
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_DVO2
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDMI
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_SD
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDCOMP
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_CLK_SRC VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] HDCOMPCLK
[m3vpss ] DBG: cnt 0
[m3vpss ] DBG: vencs is 0
[m3vpss ] DBG: vencInfo->modeInfo[0].vencId = 1
[m3vpss ] DBG: cnt 1
[m3vpss ] DBG: vencs is 1
[m3vpss ] DBG: vencInfo->modeInfo[1].vencId = 2
[m3vpss ] DBG: cnt 2
[m3vpss ] DBG: vencs is 3
[m3vpss ] DBG: vencInfo->modeInfo[2].vencId = 4
[m3vpss ] DBG: cnt 3
[m3vpss ] DBG: vencs is 7
[m3vpss ] DBG: vencInfo->modeInfo[3].vencId = 8
[m3vpss ] DBG: dcConfigVencMode is called from dcSetConfig
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4

[host]
********** FULL FEATURE USECASE ********

[host] ********* Entered Tri Streaming usecase - H264 1080p @60fps + H264 D1 @30fps + MJPEG 1080p @5fps ********

[host] 150: MCFW : CPU Revision [ES1.0] !!!

[host] 150: MCFW : Detected [4x TVP5158 VS] Board !!!

[host] 150: MCFW : Base Board Revision [REV A] !!!

[host] 150: MCFW : Daughter Card Revision [REV A] !!!
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 1
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2442 retval is 0
[m3vpss ] DBG: at line 2452 retval is 0
[m3vpss ] DBG: at line 2491 retval is 0
[m3vpss ] DBG: at line 2501 retval is 0
[m3vpss ] DBG: at line 2508 retval is 0
[m3vpss ] DBG: at line 2334 retval is 0
[m3vpss ] DBG: at line 2346 retval is 0
[m3vpss ] DBG: Before outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen =5
[m3vpss ] DBG: After outputNode->setMode called
[m3vpss ] DBG: vencInfo
[m3vpss ] DBG: tiedVencs = 5
[m3vpss ] DBG: numVencs = 4
[m3vpss ] DBG: vencInfo >> modeInfo
[m3vpss ] DBG: vencId = 4
[m3vpss ] DBG: mode = 0
[m3vpss ] DBG: isVencRunning = 0
[m3vpss ] DBG: numInPath = 0
[m3vpss ] DBG: vencInfo >> modeInfo >> mInfo
[m3vpss ] DBG: standard = 13
[m3vpss ] DBG: width = 1920
[m3vpss ] DBG: height = 1080
[m3vpss ] DBG: scanFormat = 1
[m3vpss ] DBG: pixelClock = 148500
[m3vpss ] DBG: fps = 60
[m3vpss ] DBG: hFrontPorch = 88
[m3vpss ] DBG: hBackPorch = 148
[m3vpss ] DBG: hSyncLen = 44
[m3vpss ] DBG: vFrontPorch = 4
[m3vpss ] DBG: vBackPorch = 36
[m3vpss ] DBG: vSyncLen = 5
[m3vpss ] DBG: at line 2442 retval is 0
[m3vpss ] DBG: at line 2452 retval is 0
[m3vpss ] DBG: at line 2491 retval is 0
[m3vpss ] DBG: at line 2501 retval is 0
[m3vpss ] DBG: at line 2508 retval is 0
[m3vpss ] DBG: at line 2590 retval is 0
[m3vpss ] DBG: at line 2594 retval is 0
[m3vpss ] DBG: at line 2590 retval is 0
[m3vpss ] DBG: at line 2594 retval is 0
[m3vpss ] DBG: retVal of dcConfigVencMode is 0
[m3vpss ] DBG: retVal = 0
[m3vpss ] 2317: CAMERA: Create in progress !!!
[m3vpss ] Channel Num Stream 0 Ch 0 ChannelNum 0
[m3vpss ] Channel Num Stream 1 Ch 0 ChannelNum 1
[m3vpss ] 2318: CAMERA: VIP0 PortA camera mode is [ 8-bit, Non-mux Embedded Sync] !!!
[m3vpss ] 2318: CAMERA: VIP 0: VID DEC 268436737 (0x10): 0002:20202020:20202020, AUD_STATUS 538976288
[m3vpss ] Iss_captCreate:1661
[m3vpss ] 2526: CAMERA: Create Done !!!
[m3vpss ] 2614: CAMERA: Detect video DMA: ChannelID allocated:6
in progress !!!DMA: ChannelID allocated:7

[m3vpss ] 2614: CAMERA: Detect video Done !!!
[m3vpss ] 2685: DUP   : Create Done !!!
[m3vpss ] 2621: VNF:
[m3vpss ] Create in progress ... !!!
[m3vpss ] 2621: VNF:
[m3vpss ] Input Channel CH0 of 1952 x 1112, pitch = (1984, 1984) [0,0][PROGRESSIVE] [7] ...
[m3vpss ] 2622: VNF:
[m3vpss ] [VNF] eOperateMode=6 [6-TNF3,7-NSF2]chVnfCreateParams->ulStartX = 0            chVnfCreateParams->ulStartY = 0 chVnfCreateParams->ulInputStride = 1984               chVnfCreateParams->ulInputWidth=1952,chVnfCreateParams->ulInputHeight=1112
[m3vpss ] 2789: VNF:
[m3vpss ] [VNF] outChInfo->StartX = 0 outChInfo->startY = 0 outChInfo->pitch[0] = 1952   outChInfo->width=1920,outChInfo->height=1080
[m3vpss ] 2791: VNF:
[m3vpss ] Create ... DONE !!!
[m3vpss ] 2856: NSF: CreateDMA: ChannelID allocated:8
in progress !!!
[m3vpss ] NSF::HEAPID:0   USED:128
[m3vpss ] NSF::HEAPID:1   USED:4928
[m3vpss ] 2983: NSF: Create Done !!!
[m3vpss ] DCC server task running
[m3vpss ] 2987: Mux   : Creating... !!!
[m3vpss ] 2988: WARNING MUX Link : Ignoring channel no   0 of Input Q ID   0. As this channel was not mapped !!!
[m3vpss ] 2989: Mux   : Create Done !!!
[m3vpss ] 2996: DUP   : Create Done !!!
[m3vpss ] 3002: DUP   : Create Done !!!
[m3vpss ] 3003: Mux   : Creating... !!!
[m3vpss ] 3005: Mux   : Create Done !!!
[m3vpss ] {SWOSD} edma3Handle->tccVal = 36
[m3vpss ] {SWOSD} edma3Handle->chId   = 36

[host] Vsys_eventHandler:OSA_dmaOpen passed with ch id = 6

[host] Vsys_eventHandler:OSA_dmaOpen passed with ch id = 7
[m3vpss ] {SWOSD} edma3Handle->tccVal = 37
[m3vpss ] {SWOSD} edma3Handle->chId   = 37
[m3vpss ] {SWOSD} edma3Handle->tccVal = 38
[m3vpss ] {SWOSD} edma3Handle->chId   = 38
[m3vpss ] 3014: SYSTEM: Opening MsgQ [HOST_MSGQ] ...
[m3vpss ] 3008: SWOSD   : Create Done !!!
[m3vpss ] 3080: DUP   : Create Done !!!
[m3vpss ] 3080: SCLR: Create in progress !!!

[host] Vsys_eventHandler:OSA_dmaOpen passed with ch id = 8
[m3vpss ] 3085: SCLR    : Loading Up-scaling Co-effs ...
[m3vpss ] 3085: SCLR    : Co-effs Loading ... DONE !!!
[m3video] 3098: IPC_IN_M3   : Create in progress !!!
[m3video] 3098: SYSTEM: Opening ListMP [VPSS-M3_IPC_OUT_0] ...
[m3vpss ] SCLR:HEAPID:0   USED:64
[m3video] 3099: SYSTEM: Opening ListMP [VPSS-M3_IPC_IN_0] ...
[m3vpss ] SCLR:HEAPID:1   USED:5952
[m3video] 3101: IPC_IN_M3   : Create Done !!!
[m3vpss ] 3086: SCLR: Create Done !!!
[m3video] 3102: ENCODE: Create in progress ... !!!
[m3vpss ] 3031: FD   : Alg Create Done !!!
[m3vpss ] 3032: FD   : Create Done !!!
[m3vpss ] 3096: IPC_OUT_M3   : Create in progress !!!
[m3vpss ] 3098: IPC_OUT_M3   : Create Done !!!
[m3video] 3228: ENCODE: Creating CH0 of 1920 x 1080, pitch = (1952, 1952) [PROGRESSIVE] [NON-TILED ], bitrate = 8000 Kbps ...
[m3video] ENCLINK_H264:HEAPID:0   USED:13272
[m3video] 3309: ENCODE: Creating CH1 of 720 x 480, pitch = (720, 720) [PROGRESSIVE] [NON-TILED ], bitrate = 8000 Kbps ...

[host] IpcBitsInLink_tskMain:Entered
[host] 1170: IPC_BITS_IN   : Create in progress !!!

[host] 1170: IPC_BITS_IN   : ListMPOpen start !!!

[host] 1170: SYSTEM: Opening ListMP [VIDEO-M3_IPC_OUT_29] ...

[host] 1172: SYSTEM: Opening ListMP [VIDEO-M3_IPC_IN_29] ...

[host] 1174: IPC_BITS_IN   : ListMPOpen done !!!

[host] 1175: IPC_BITS_IN   : System_linkGetInfo done !!!

[host] 1175: IPC_BITS_IN   : Create Done !!!
[m3vpss ] 3406: DISPLAY: Create in progress !!!
[m3video] ENCLINK_H264:HEAPID:0   USED:11720
[m3vpss ] DisplayId = 1,DataFormat = 7
[m3video] 3393: ENCODE: Creating CH2 of 1920 x 1080, pitch = (1952, 1952) [PROGRESSIVE] [NON-TILED ], bitrate = 100 Kbps ...
[m3vpss ] SC2 displayInstId = 6
[m3vpss ] 3407: Assertion @ Line: 1089 in links_m3vpss/display/displayLink_drv.c: pObj->displayHndl != NULL : failed !!!
[m3video] ENCLINK_JPEG:HEAPID:0   USED:4368
[m3video] 3394: ENCODE: All CH Create ... DONE !!!
[m3video] ENCLINK:HEAPID:0   USED:29688
[m3video] 3396: ENCODE: Create ... DONE !!!
[m3video] 3362: VSTAB   : Alg Create Done !!!
[m3video] 3362: VSTAB   : Create Done !!!
[m3video] 3397: IPC_BITS_OUT   : Create in progress !!!
[m3video] 3400: IPC_BITS_OUT   : Create Done !!!

------------------------------------------------------------------------------------------------------------------------------------------------------

Please suggest us how to move forward. As we still getting assertion (shown in red) even after we hard code the params in a fresh build without any other changes except for tying HDMI and VDO2.

Regards,

Sunny

0 Brijesh Jadav over 12 years ago in reply to Sunny Shukla

TI__Guru**** 504415 points

Hi Sunny,

I dont think hard coding to fixed will be solution, i think it would be better to debug it why values are becoming zero when SET_CONFIG is called. Which A8/m3 call calls this ioctl? why these values are becoming 0?

Rgds,

Brijesh

0 Sunny Shukla over 12 years ago in reply to Brijesh Jadav

Prodigy 220 points

Hi brijesh,

Ya we will debug that why value is setting to 0 in SET_CONFIG , but can you still suggest that even after hard coding , the assertion in dcConfigVencMode is cleared still why we are getting the assertion like below.

[m3vpss ] 3407: Assertion @ Line: 1089 in links_m3vpss/display/displayLink_drv.c: pObj->displayHndl != NULL : failed !!!

Regards,

Sunny.

0 Sunny Shukla over 12 years ago in reply to Sunny Shukla

Prodigy 220 points

Hi brijesh,

We followed this link :- http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/237567.aspx

In this we followed the changes suggested by Bioz and we are able to tie DVO2 with HDMI successfully by following changes.

-------------------------------------------------------------------------------------------------------------------------------------------------------------

File :- ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c

Changes

Vps_DcConfig gSystem_dctrlTriDisplayConfigHdmiDvo2 = {
    VPS_DC_USERSETTINGS, /* Use Case */
    /* Edge information */
    {
        {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX} ,
        {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
        {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},
        {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND} ,
        {VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX} ,
        {VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND} ,
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND} ,
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND} ,
        {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},

        {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
        {VPS_DC_AUX_INPUT_PATH, VPS_DC_VCOMP_MUX},
        {VPS_DC_BP1_INPUT_PATH, VPS_DC_SDVENC_MUX},
    },

    12,
    /* VENC information */
    {
        /* Mode information */
        {
            {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_30}},
            /* 1080p30 is mode
             * is overwritten
             * later inside
             * System_displayCtrlInit
            */
            {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_30}},
            /* 1080p30 is mode
               * is overwritten
               * later inside
               * System_displayCtrlInit
            */
            {VPS_DC_VENC_SD, {FVID2_STD_NTSC}}
        },
        /* Tied VENC bit mask */
        (VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2),
        /* Number of VENCs */
        3u
    }
};

File :- ipnc_rdk/ipnc_mcfw/demos/mcfw_api_demos/multich_usecase/ti_mcfw_ipnc_main.c

Changes

Vdis_tiedVencInit(VDIS_DEV_DVO2, VDIS_DEV_HDMI, &vdisParams);

File :- ipnc_rdk/ipnc_mcfw/mcfw/src_linux/mcfw_api/ti_vdis.c

Changes

#if defined (TI_8107_BUILD)
    //Original Code
    /*
    pContext->tiedDevicesMask = VDIS_VENC_HDMI | VDIS_VENC_HDCOMP;
    pContext->deviceParams[VDIS_DEV_HDCOMP].resolution = pContext->deviceParams[VDIS_DEV_HDMI].resolution;
    */
    //Modified Code
   pContext->tiedDevicesMask = VDIS_VENC_DVO2 | VDIS_VENC_HDMI;
   pContext->deviceParams[VDIS_DEV_HDMI].resolution = pContext->deviceParams[VDIS_DEV_DVO2].resolution;
   system("echo 1:hdcomp > /sys/devices/platform/vpss/graphics1/nodes");
#endif

-------------------------------------------------------------------------------------------------------------------------------------------------------------------

We then to add custom resolution for DVO2 followed the following links

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/297015.aspx
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/267506/935514.aspx#935514

We were able to set VSYS_STD_CUSTOM to 240 x 320 resolution.

We then checked this change of resolution without tying HDMI with DVO2 (i.e. default HDMI and HDCOMP tied) . It worked and we were able to get 240 x 320 resolution on HDMI display.

But when we tied HDMI and DVO2 we are facing assertion (as follows) in the display control tree.

-------------------------------------------------------------------------------------------------------------------------------------------------------------------

Display Control Tree

[host] Before System_linkControl SYSTEM_M3VPSS_CMD_GET_DISPLAYCTRL_INIT
[m3vpss ] DBG: line 486
[m3vpss ] DBG: gSystem_objVpss.displayCtrlCfg.vencInfo.modeInfo[1].vencId 4
[m3vpss ] DBG: line 218
[m3vpss ] DBG: gSystem_objVpss.displayCtrlCfg.vencInfo.modeInfo[1].vencId -1891985976
[m3vpss ] tiedVencs VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] VPS_DCTRL_INST_0
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_DVO2
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDMI
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_SD
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_OUTPUT SYSTEM_DC_VENC_HDCOMP
[m3vpss ] IOCTL_VPS_DCTRL_SET_VENC_CLK_SRC VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2
[m3vpss ] HDCOMPCLK
[m3vpss ] DBG: cnt 0
[m3vpss ] DBG: vencs is 0
[m3vpss ] DBG: vencInfo->modeInfo[0].vencId = 1
[m3vpss ] DBG: cnt 1
[m3vpss ] DBG: vencs is 1
[m3vpss ] DBG: vencInfo->modeInfo[1].vencId = -1891985976
[m3vpss ] DBG: cnt 2
[m3vpss ] DBG: vencs is -1891985975
[m3vpss ] DBG: vencInfo->modeInfo[2].vencId = 8
[m3vpss ] DBG: Check to see if same venc id is used in multiple modeInfo instances
[m3vpss ] DBG: retVal = -3
[m3vpss ] 11007: Assertion @ Line: 824 in links_m3vpss/system/system_dctrl.c: retVal == FVID2_SOK : failed !!!

------------------------------------------------------------------------------------------------------------------------------------------------------

Hence we were able to tie HDMI and DVO2 Together.

We are also able to add support for Custom resolution.

But can u please help us to set CUSTOM resolution with HDMI and DVO2 tied together !!

Regards,

Sunny.

0 Sunny Shukla over 12 years ago in reply to Sunny Shukla

Prodigy 220 points

Hi Brijesh,

As in the above post , we followed the mesh setting as suggested by Bioz in this link :- http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/237567.aspx

One more change we did ,as we are getting assert with VSYS_STD_CUSTOM , we added a new resolution by an new macro VSYS_STD_QVGA_P_30 , and set it to 240 x 320 as per the instructions in the following links

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/267506/935514.aspx#935514

Thankfully this changes passed all the assertion . No Assertions .

But sadly , we still facing one problem , as described below :-

We use oscilloscope to measure the clk and sync signal. But the display is only black background.

One more observation ,

The display is working if we wont use this custom resolution i.e. if we use VSYS_STD_1080P_30 as below .

vdisParams.deviceParams[VDIS_DEV_DVO2].resolution = VSYS_STD_1080P_30;

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For your reference i am posting the dc mesh setting too , as follows .

//As per BIOZ ti link ....
Vps_DcConfig gSystem_dctrlTriDisplayConfigHdmiDvo2 = {
    VPS_DC_USERSETTINGS, /* Use Case */
    /* Edge information */
    {
        {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX} ,
        {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
        {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},
        {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND} ,
        {VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX} ,
        {VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND} ,
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND} ,
        {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND} ,
        {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},

        {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
        {VPS_DC_AUX_INPUT_PATH, VPS_DC_VCOMP_MUX},
        {VPS_DC_BP1_INPUT_PATH, VPS_DC_SDVENC_MUX},
    },

    12,
    /* VENC information */
    {
        /* Mode information */
        {
            {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_30}},
            /* 1080p30 is mode
             * is overwritten
             * later inside
             * System_displayCtrlInit
            */
            {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_30}},
            /* 1080p30 is mode
               * is overwritten
               * later inside
               * System_displayCtrlInit
            */
            {VPS_DC_VENC_SD, {FVID2_STD_NTSC}}
        },
        /* Tied VENC bit mask */
        (VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2),
        /* Number of VENCs */
        3u
    }
};

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Please help us to find out what is yet missing ?

Regards,

Sunny.

Processors

Processors forum

DVO2 output in IPNC RDK 3.8.0