• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 281 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Problem about DM8168 DDR 2G bld cfg

Xavier
Genius 3180 points

Hi all:

I develop on my own board,and ddr is 2G,

I use 2g.bld file in mcfw/src_bios6/cfg,

and i start my system, but when i run my demo with dsp alg,

the follow warning come out :

 [m3vpss ] WARNING!!.Tiler Memory cannot be accessed by M3 in 2G build.Will not enable

what does this mean ?

why in 2G build Tiler Memory cannot be accessed in M3,

and i also want to when to use Tiler Memory in dm8168, will it improve memory access effect ?

best regards

xavier