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LogicPD OMAP-L138 power consumption in DEEPSLEEP mode

john filo
Intellectual 260 points
Other Parts Discussed in Thread: OMAP-L138

I've been measuring power consumption of the LogicPD OMAP-L138 SOM using Wattson and was wondering if what I'm seeing is typical.  The SOM has been modified slightly; we removed the SATA and Ethernet PHY chips to further reduce power consumption.


            |  5.0V |  3.3V  1.8V  1.2V |   Sum  Loss | Efficiency
------------|-------|-------------------|-------------|-----------
 Running    | 648.6 |  61.9  61.1 251.8 | 374.7 273.9 |    57.8%
 Deepsleep  | 156.3 |  60.9  12.9   8.3 |  82.2  74.1 |    52.6%


The 'Sum' column is the sum of 3.3, 1.8, and 1.2V columns.  The Loss column is the 5V power consumption minus the sum of the other three voltages. 

I'm curious if anyone knows if these numbers for DEEPSLEEP look reasonable and if there is anything that can be done to improve these numbers? 

Thanks,

John Filo

  • 0 in reply to Titusrathinaraj Stalin
    Intellectual 260 points

    Thanks.  I'm aware of that spreadsheet, but that only covers the processor.  My question was more about other SOM power consumption.  Two things in particular; 1) the fact that the 3.3V power consumption doesn't change (and seems kind of high at ~60 mW) and the apparent low efficiency of the regulators (only about 50% when in deepsleep and not much better when running).  The 1.2 is in line with what the spreadsheet calculates for DEEPSLEEP mode (it's actually a bit lower than the predicted nunber).  I'm not sure what the DRAM should be drawing in self refresh mode, but the 12 mW I'm seeing is a number I can live with. 

  • 0 in reply to john filo
    TI__Guru* 83745 points

    Hi John

    We had collected similar data on the LogicPD SOM a few years back and from my recollection your power numbers look good. The max savings on 3.3V supplies (PMIC DCDC1) were possible with disabling the SATA (CDC chip) PHY chip and EMAC PHY etc, your numbers look good from that respect. 

    The main things on that supply are

    • Processor  USB I/O (VDD33_USB1, VDDA33_USB0)
    • Serial Boot Flash
    • 10/100 Ethernet PHY (3.3V analog port power)
    • LVDS Clock Generator (CDCM chip)
    • Misc Ics (Voltage translation, buffers, etc), Pullups

    On 1.8V supply, it is unclear which supplies you have measured, but if it is the 1.8V LDO from the PMIC, i think the power is in the 6-12 mW range.

    Please see if the LVCMOS bit is set correctly (from your power data , I think it is set correctly for lowest power)

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/66871/710087.aspx#710087

    Regards

    Mukul 

  • 0 in reply to Mukul Bhatnagar
    Intellectual 260 points

    Mukul,

    Thanks for the feedback.  The numbers are the sum across all supplies of a particular voltage, so 3.3 is the 3.3V and 3.3_OR_1.8V supplies, the 1.8 is the 1.8V_LDO supply, and the 1.2 is the 1.2V, 1.2V_LDO, and 1.2V_RTC supplies.  I was most interested in the 3.3 numbers (60 mW) because that was where most of the power is still going.  We removed the SATA and EMAC PHY (I'll probably try to figure out how to disable them to see if I can match the power draw when they are removed).  I guess I was wondering if the overall 150 mW is the lowest I can expect to get with the SOM. 

    Thanks,

    John Filo