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C6457 DDRREFCLK(N/P) Usage

Ruifeng Wang
Intellectual 290 points

DDR is not used in our design, how to handle the DDRREFCLK (N/P)? The DSP Hardware Design Guide provides two conflict handlings.

  1.  
    • On pg8, LJCB(Low Jitter Clock Buffer) should handle as Fig 3, which state that LJCB_P connect to 1.1V and LJCB_N connect 1Kohm resistor to GND
    • On pg34, it state that: If the DDR2 peripheral is disabled, all interface signals (including reference clocks) can be left floating and input buffers will be powered down.

Thanks.

  • 0
    TI__Guru* 84110 points

    The problem with floating inputs is the potential for switching noise and excessive power.

    These two recommendations cover different scenarios. If the input buffers are active, then you must follow the recommendation on page 8. If the input buffers are powered down based on your chip settings, then the external connections are not required.