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Programm and data memory mixing problem



Hi

I am facing with very strange problem

I am working with DM642  DSP , with c6000  DSP core . The part of program and data code are placed in external SDRAM

During the program , I  need sometimes  replace the part of my program code in SDRAM  with another code.

During the code replacement routine , I treat the program memory in SDRAM as data memory . 

After copy of a new program code to its location in SDRAM I make verification  , that the copied code is ok. I did it with “mecmp” function

And sometimes I get “not equal”  result ! But , if I put  some wait after memory copy , the result is always ok .

 

Bad copy example

1 .Fill SDRAM memory with new code

2. Read SDRAM back and compare to  sources buffer -  sometimes bad result

 

Always good copy example

1 .Fill SDRAM memory with new code

2. Wait 1 mili

3. Read SDRAM back and compare to  sources buffer -  always good result

Why it can be ? 

All interrupts are disabled, L2 CACHE also disabled

 As I understand , the CPU access the program and data memory  via 2 different controllers  to EMIF

May be , there is some problem , when I try to access the  program memory in SDRAM via data access controller ?

 

Thanks

  • Genady,

    Try flushing (invalidate) L1P cache after doing the memcpy.

    Are you using the library memcpy function or an EDMA function to do the program overlay copy?

    Regards,
    RandyP

  • Hi

    I  am using copy in loop , without memcpy and EDMA

    I tried flushing (invalidate) L1P , it did not help

    Its seems to me not cache problem .. something else

    Why wait , after copy solve the problem ?

    Regards

    Genady

     

  • Genady,

    What is the nature of the miscompares? You will need details to discover any possible correlation to the cause.

    There is no reason I can think of for a time delay to effect the copy results other than the completion of a cache event.

    Even though you have said the invalidate L1P did not fix the problem, you must writeback-invalidate L1D and invalidate L1P after completing the copy, before starting to execute from the newly written code.

    How much can you lower the 1 ms delay before the errors will start happening again?

    When an error shows up, if you repeat the compare will the same error still be there?

    If you do the compare without the delay, find an error, then wait 1ms and repeat the compare, will the error still be there?

    Regards,
    RandyP