how can we read and write into EMIF?

Hi,

Sorry, I do not know about this C6211 type of old processor.

And I have dome some search and got below informations.

Please refer the below link for EMIF example codes for C6211

http://www.dsplab.elf.stuba.sk/signal_processors/09_External_Memory_Interface.pdf

http://my.fit.edu/~vkepuska/ece3551/TI%20Tutorial/DSP%20Code%206711%20Update/Chapter%2008%20-%20EMIF/

Rakesh,

Please explain your question in more detail.

Is it simply a question of using CE1 for the asynchronous I/O buffer? Or is the asynchronous I/O buffer on the IOPORT?

An asynchronous I/O buffer does not sound like an addressable device. Is this something already on the board or a new feature you are adding to the board?

Regards,
RandyP

Sir, I have two pins on my DSP Board. That has to be read data from external world. These Two pins are mapped on to CE2 spaces ( i.e 0xA0000000- OxAFFFFFFF). When i am debugging the code, each time getting different values. If it read properly, the pin connecting to one of the ED[31:0] should be high, isn't it?

ie assume one of the pin that is  reading data connected to ED24, when this pin connected to Vcc, will the read data be 0x01000000?

For further clarification I have attaching my code here........

#define CHIP_6211 1

#include "c6211dsk.h"

#include <stdio.h>

#include <csl_emif.h>
#include <csl_chiphal.h>

#define OUTPUT *(volatile int *)0xA0000000

unsigned int k=0;

void main()
{     
    k=OUTPUT;
    while(1);
}

Rakesh,

I still have no idea what you want to know or do. There is not enough information here.

Are you using a DSK6211 or your own custom board?

What data value in 'k' do you get when you read from OUTPUT in your code?

How are the two pins mapped onto CE2 spaces?

Regards,
RandyP

Randy,

I am using custom board based on 6211.

Here I configure the two pins as GPIO. These pins are mapped on to CE2 spaces. Here I am reading the two pins by connecting one of the pins to Vcc other to ground.

Few ED pins are from EMIF of DSP connected to the 20 pin connector via latch.

Now I am getting the correct value in 'k' only when AWE pin of EMIF high because I am using SN74LVCH16245A latch and AWE is connected to DIR pin of the latch, GPIOs are connected to A side and ED are connected to B side of the latch. So when AWE is high, data from A to B of the latch taking Place.

Is there any chance to manually enable the AWE pin other than connected to Vcc permanently?

Rakesh,

FYI, the SN74LVCH16245A is not a latch because it does not retain a pin's value after some latch condition is met. This device is a simple bus transceiver.

What is the 20 pin connector you are mentioning, if that is relevant to this discussion?

Rakesh T said:

Now I am getting the correct value in 'k' only when AWE pin of EMIF high because I am using SN74LVCH16245A latch and AWE is connected to DIR pin of the latch, GPIOs are connected to A side and ED are connected to B side of the latch. So when AWE is high, data from A to B of the latch taking Place.

Every time you read OUTPUT in your program, the AWE signal from the EMIF will be high. So every time you assign the value from OUTPUT to the variable 'k', the value should be correct, from what you have said here.

If the value in 'k' is always correct, what is the problem that you are asking about?

Rakesh T said:

Is there any chance to manually enable the AWE pin other than connected to Vcc permanently?

If you write to OUTPUT in your program, then AWE will pulse low during that operation. For example, use

OUTPUT = k;

What is connected to the OEn pin on the SN74LVCH16245A?

To understand the use of the EMIF, please refer to the C6000 EMIF Reference Guide, spru266. And the links that Titus referenced in his first reply.

Regards,
RandyP

Randy,

Anded value of CE2 and CE3 of EMIF is connected to OE pin of the bus transceiver. My question is How can we manually enable AWE pin, other than enable by itself at the time of reading?

Rakesh,

Do you have a colleague who can look at your design and the logic reasoning with you? I think you need some advice more than the clarifications that can be offered here about how a DSP works.

Nothing in your post above is correct:

- ANDing CE2 and CE3 does not make any logical sense. It cannot be a successful design under any condition I can imagine, although I do not have clarity on what you are doing. ANDing CE2 and AOE would make sense, but would not be very useful, either.

- You cannot manually enable AWE. It is a signal from the EMIF and it operates as defined in the EMIF Reference Guide. Perhaps I have answered your question and this thread is Answered and finished? If so, please mark this post as Answered and we can close it.

- AWE is not enabled at the time of reading. AWE is an active-low Write Enable signal, so it is enabled at the time of writing.

In this thread, we have been talking at a very low level of detail. Your questions and statements do not give me confidence that we can come to a resolution. The only thing I can suggest is that you use GPIOs to control the 16245 in order to force it to do what you want, and also use GPIOs to read the values from that bus transceiver for a few pins. Some pins from unused peripherals can be used as GPIOs; take a look at the McBSP and Timers if you want to try this.

I you want to discuss your application requirements at a higher level, such as what the board is supposed to do, you are welcome to do so. You can do that on this thread or on a new one, as you wish.

Regards,
RandyP