We are developing a product which is based on the beagle bone black board.
Currently we focusing our efforts to bring-up our board ,which is based on the beagle bone black device, But we are encountering the following problems:
1. We notice that SPL (TI Uboot first stage) uses address 0x0038000 as a debug trace log, when examine the AM3xx data sheet we found that address 0x0038000 belongs to a memory section that is declared as GPMC external memory.
We couldn't find any volatile memory hardware that is mapped to the GPMC external memory. We notice that Uboot SPL runs without any problems both the beaglebone black and the beagle bone black Evb. However Uboot - SPL crashes when accessing the GPMC external memory on our board, Can you help us resolve it?
2. How can we remove the beagle bone EEPROM (device ID chip) ?
3. According to Beaglebone black when pushing S2 during boot up time The processor internal ROM boot loader should perform the following boot sequence: MMC1 -> UART, However we are unable to boot the "Uboot - SPL" through UART0 on the beaglebone black board.
4. How can be load a boot loader to address 0x402f0400 in the CPU internal SRAM, Using the TI TAG model XDS100V2 and then launch it. (It seems that this memory address is not accessible to TI Jtag debugger). If we can't can you advice us how to debug Uboot - SPL using Ti Jtag?
