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Generating ECC purposely

takahiro kusunoki
Prodigy 130 points

Hi Support team

Let me ask you about ECC in Keystone2.

Does Keystone2 device have the function which purposely generate 1bit and 2bit ECC error for Debug purpose?

I've heard a processor from other vendor had such kind of function(register).

I checked " DDR3 Memory Controller Users Guide" but I couldn't find it.

I'd appreciate if you could give me the answer.

Best Regards,

Kusunoki 

  • 0
    TI__Mastermind 42545 points

    Kusunoki-san,

    I am not aware of that capability existing in the KeyStone II devices. That is not the method we used to test the ECC. We used the following method.

    1- Enable ECC+RMW, write to memory.

    2- Disable the ECC in the EMIF controller (ECC byte lane still enabled in PHY), then inject errors by corrupting the data.

    3- Re-enable ECC in EMIF and read data. ECC should correct the injected errors.

    Regards, Bill

  • 0 in reply to Bill Taboada
    Prodigy 130 points

    Hi Bill-san

    Thank you for your reply.

    I understand how to test ECC with Keystone2 device.

    Let me close my question.

    I'd appreciate your help.

    Best Regards,

    Kusunoki