invalidate L1D cache , after DMA transfer

Hו

I am using the DM642 DSP with 64M of external SDRAM

Only the first 32M of SDRAM are enabled for caching (only MAR128 , 129 are enabled) , and the 64k of L2 is configured as L2 cache

 I have buffer , located in SDRAM ,in address above 32M , not  cached on L2 .  The buffer is filled from EMIF A , via DMA 

Do I  need the execute L1D  cache  invalidate operation , after DMA transfer , although caching is disabled ?

There is direct way to bring data from CPU to SDRAM , not  via L1D ?

Thanks