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Unable to Service DMA interrupt after waking up from IDLE3 Mode !!

Other Parts Discussed in Thread: TMS320C5505

What am i trying to do is just entering to IDLE 3 Mode and coming out of it with an alarm interrupt of 5 Seconds,every time i get alarm interrupt in the isr i will try to update the time to zeros and alarm time to 5seconds thus each time i will generate alarm for every 5seconds,so my C55x has to sleep generally and has to getup for every 5seconds

there is no problem with my rtc alarm generation its working fine,when i enter in to IDLE3 mode my processor is just hung or i dont know how to put it in what state it is ?

but when i pause the my code i am stuck up at 

Here is is the IDLE3 Routine

void Go2Sleep_IDLE3( void )
{
	unsigned int temp=0;

	//1.Stop DMA Tx
		DMA_Record_Stop();
	//2.Disable USB Clock-not disabled
		//Request for stopping USB Clock
		CLK_STOP=0x0002;
		//Wait for ACK
		while(CLK_STOP & 0x04 == 0x04);
	//3.Disable  Clocks to Peripherals
		//Request for stopping UART Clock
		CLK_STOP=0x0008;
		//Wait for ACK
		while(CLK_STOP & 0x10 == 0x10);

		IDLE_PCGCR=0XfFFF;//leave system clock and disable rest of the peripherals
		IDLE_PCGCR_MSW=0XFFFF;//disable the clock to the rest of the peripherals
	//4.Disable the PLL and make the Chip Run by only RTC
		//Enter PLL Bypass
		CONFIG_MSW = 0x0;//Now Program Run through RTC only
		//Power Down PLL
		PLL_CNTL1|=PLL_PWRDN;
	//5.Clear all Interrupts of IFRx
		IFR0=0xFFFF;
		IFR1=0xFFFF;
	//6.Enable appropriate Wakeup;wakeup through rtc
		temp=RTC_STAT;
				RTC_STAT=temp;
		RTC_INT=((RTC_ALARM_INT_EN) /*|(RTC_EXT_INT_EN)*/);//enable alarm interrupt
	//7.Disable the CPU domain by setting to 1 the CPUI, MPORTI, XPORTI, DPORTI, IPORTI, and CPI bits
		//of the idle configuration register (ICR)
		IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|MPORT_IDLE|IPORT_IDLE|HWA_IDLE ;
	//8.Appply the IDLE3 Configuration
		asm(" idle");//space mandatory before instruction !
}

Here is the Wakeup Routine

void Wakeup_IDLE3( void )
{
	unsigned int temp=0;

	//1.Enable the CPU domain by setting to 1 the CPUI, MPORTI, XPORTI, DPORTI, IPORTI, and CPI bits
		//of the idle configuration register (ICR)
	IDLE_PCGCR=0;
	IDLE_PCGCR_MSW=0;

	//Power Up PLL

	Board_Init();
	temp=RTC_STAT;
			RTC_STAT=temp;
			rtc_reset();
			RTC_Set_SecA(5);

}

where exactly i am going wrong ???

i dont see any power reduction in  my custom board at all,am i shutting down the ports properly

  • Hello DARAM,

    Can you please check your sequence with the below mentioned IDLE3 procedure.Your PLL powerdown must be last step before you issue IDLE instruction.

    The below link will assists you in estimating the power consumption, you can download the power estimation sheet from download section.

    http://processors.wiki.ti.com/index.php/TMS320C5504/05/14/15/32/33/34/35_Power_Consumption_Summary

    IDLE 3 Procedure:

     1. Wait for completion of all DMA transfers. You can poll the DMA transfer status and disable DMA transfers through the DMA registers.

    2. Disable the USB clock domain .

    3. Idle all the desired peripherals in the peripheral clock domain by modifying the peripheral clock gating configuration registers (PCGCR1 and PCGCR2).

    4. Disable the clock generator domain as described in

    5. Clear all interrupts by writing ones to the CPU interrupt flag registers (IFR0 and IFR1).

    6. Enable the appropriate wake-up interrupt in the CPU interrupt enable registers (IER0 and IER1).

            • If using the WAKEUP pin to exit this mode:

                (a) Configure the WAKEUP pin as an input by setting WU_DIR = 1 in the RTC power management register (RTCPMGT)

                (b) Enable the external event interrupt by setting EXTINTEN = 1 in the RTCINTREG register.

            • If using the RTC alarm or periodic interrupt as a wake-up event, the RTCINTEN bit must be set in the RTC interrupt enable register (RTCINTEN).

    7. Disable the CPU domain by setting to 1 the CPUI, MPORTI, XPORTI, DPORTI, IPORTI, and CPI bits of the idle configuration register (ICR).

    8. Bypass the PLL by setting SYSCLKSEL = 0 in the CCR2 register.

    9. Power down the PLL by setting the PCR register to A000h.

    10. Apply the new idle configuration by executing the IDLE instruction. The content of ICR is copied to the idle status register (ISTR). The bits of ISTR are then propagated through the CPU domain system to enable or disable the specified clocks.

    Hope the above information helps.

    Regards

     Vasanth

  • Sorry Vasanth i did not mention processor,its C5515 if u go through section 1.5.5.2 its clearly mentioned how to enter to IDLE3 Mode 

    1.disable dma clocks

    2.disable usb clocks

    3.disable other pheripheral clocks

    4.disable clockgenerator here comes the step of enter to bypass and power down PLL

    5.clear interrupts

    6.enable alarm interrupt

    7.load ICR

    6.effect of ICR after idle instruction execution

    every thing is clear but my board with out entering to IDLE consumes 14mA of current even after entering in to it did not made any difference. so my doubt is,may be i did not enter in to IDLE3 Mode how can i make sure i am in IDLE3 is i have to check through ISTR,but after executing idle instruction if i put a break point and try to view the location 0x2 which is the IO location of ISTR which gives me error like this

    C55xx: Trouble Reading Memory Block at 0x2 on Page 2 of Length 0xd8: (Error -1069 @ 0x136) Device memory bus has an error and may be hung. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0) 
    

    so where am i going wrong in entering in to IDLE3 Mode ??

  • Can you disable the master clock in PCGCR register before you issue IDLE command .

    Also,are you using Custom board or an EVM ?

    Regards

     Vasanth

  • that is what is being done even in the above code i posted the system clock in PCGCR is disabled before issue of IDLE itself,i am using a custom board based on eZDSP which has the emulator seperated from the board and rest of it is mostly similar

  • I meant, to disable the Master clock just before issuing the IDLE command.

    Sharing the snapshot of the code that was expected.

    /*****************************************************************************/

        printf("\nDisabling Clk to all preipherals except"
        " Sysclk to clk generator\n");
        CSL_SYSCTRL_REGS->PCGCR1 |= 0x7FFF;
        CSL_SYSCTRL_REGS->PCGCR2 |= 0xFF;

        CSL_CPU_REGS->IFR0 |= 0xFBFC;
        CSL_CPU_REGS->IFR1 |= 0x07FF;

        CSL_RTC_REGS->RTCINTREG |= CSL_RTC_RTCINTREG_EXTINTEN_MASK;


      CSL_SYSCTRL_REGS->CCR2 &= ~CSL_SYS_CCR2_SYSCLKSEL_MASK;
      CSL_SYSCTRL_REGS->CGCR1 |= CSL_SYS_CGCR1_PLL_PWRDN_MASK;

      //Disabling Master Clock

      CSL_SYSCTRL_REGS->PCGCR1 |= 0x8000;

        CSL_IDLECTRL_REGS->ICR |= (CSL_IDLE_ICR_HWAI_MASK | CSL_IDLE_ICR_CPUI_MASK);
        printf("\nExecuting IDLE instrn next ");
        //printf("\nSystem is in IDLE3 mode. "
        //      "You may measure the power now..."
        //  "\n Expect The Alarm event and subsequent exit from "
     //        " the IDLE state at the time mentioned above");
        asm("\tIDLE                      ;====> CODE AUTO-GENERATED by CSL");

        asm("\tNOP");
        asm("\tNOP");
        asm("\tNOP");
        asm("\tNOP");
        asm("\tNOP");
        asm("\tNOP");

    /*****************************************************************************/

    Once you get into Idle mode, the power should definitely reduce.

    Also can you let us know whether you are using custom board or the EVM ?

    Hope the above code / information should help you to proceed further.

    Regards

     Vasanth

  • Thank you verymuch vasanth

    your suggestion worked ,i was successfully able to enter and exit from the idle mode but now another problem arised 

    to expalin my approach in a nutshell i would put it this way 

    i was applying this go to sleep mode routine in dma ISR and in the Timer ISR after 5 sec i would wakeup and reinitialize the DMA to sleep again for 5sec

    after first wakeup i was not able to see the DMA interrupt at all, my wakeup sequence is as follows

    void Wakeup_IDLE3( void )
    {
    	
    	//Enable Clocks
            //Enable PLL to 100MHz
            //Enable Peripheral Clocks
            //Init & Enable UART
            //Initi &Enable I2c rtc dma spi aic3204 etc
    
    }

    the problem is only with DMA while i was able to work with UART and timer interrupts what may be wrong  only with DMA 

  • Good to know that IDLE-3 scenario worked.

    Regarding wake up and DMA ISR issue : If you are using the Idle3 mode and trying to wake up through RTC interrupts, then there could arise a race condition between two different frequency domain.

    Race condition Mitigation procedure needs to be followed, below is the wiki link which provides more details.

    http://processors.wiki.ti.com/index.php/C55xx_RTC_ONLY_MODE_SUPPORT

     Hope this helps.

     Regards

     Vasanth

  • in my case i dont think any race condition is happening

    because i am able to wake up and sleep for every 5sec but the problem is dma intterupt alone is not working but the rtc alarm interrupt is working as usual

    my program flow in detail

    main()
    {
    disable_rtc();
    enable_board();
    enable_dma();
    start_dma(); if(flag == RTC) { wakeup(); enable_board(); enable_dma();
    start_dma(); pf(wokeup - inside rtc); } if(flag == dma) { enable_rtc_alarm(5sec); disable_everything(); pf(going to sleep); gotosleep_I3(); } }

    what is expected is

    going to sleep

    wokeup - inside rtc

    going to sleep

    wokeup -inside rtc ...

    what i have been facing is 

    going to sleep

    wokeup -inside rtc 

    wokeup - inside rtc

    wokeup -inside rtc for every 5sec as alarm is 5sec

    but never dma is serviced despite its been reinitialised as its reinitialized during board powerup

    my wakeup sequence in detail

    >Global Interrupt Disable
    >PLL 100Mhz
    >Enable the required peripherals 
    >Config Port 0x1a3f
    >Uart_init
    >I2c_Init
    >Going detail to DMA Init
      // DMA Controller out of Reset
      PER_RESET=(PER_RESET|(1<<4));
      // Enable DMA Clock in PCGCR1 & 2 - DONE
      IFR0=0xffff;
      // Disable DMA Interrupt in DMAIER Register
      DMAIER = 0x00F0 ;  //DMA1
      // Ensure that All DMA Interrupt Flags are Cleared
      DMAIFR = 0xFFFF ;
      //Ensure all other Flags Cleared in IFRx
      temp=IFR0;
      IFR0=temp;
      temp=IFR1;
      IFR1=temp;
      RecvBuf = &g_DMA_RecodingBuf[0];
      DMA1CH1TCR2 = 0x0084 ;// DMA_EN = 0, Source Addr = Constant, Destn Add Auto Inc, Sync Mode
      src_add = (Uint32)RecvBuf ;
      if((src_add >= CSL_DMA_DARAM_START_ADDR)
    		              && (src_add <= CSL_DMA_DARAM_END_ADDR))
    		{
    			src_add = (src_add << CSL_DMA_ADDR_SHIFT) + CSL_DMA_DARAM_ADDR_OFFSET;
    		}
    		else if((src_add >= CSL_DMA_SARAM_START_ADDR)&& (src_add <= CSL_DMA_SARAM_END_ADDR))
    		{
    			src_add = (src_add << CSL_DMA_ADDR_SHIFT)+ CSL_DMA_SARAM_ADDR_OFFSET;
    		}
      DMA1CH1DSAU = (Uint16) (src_add >> 16) ;
      DMA1CH1DSAL = (Uint16) src_add ;
      // Dest Address = I2S0 Address, No Inc
      DMA1CH1SSAU = 0 ;
      DMA1CH1SSAL = 0x2A28 ;			
      // Select Event I2S0 to Trigger DMA in DMAnCESR
      DMA1CESR1 = 0x0201 ;
      DMA1CESR2 = 0x0000 ;
      DMA1CH1TCR1 = DMA_RECORD_BUFFER_SIZE * 4 ;// Len=240
      DMA1CH1TCR2 = 0x3084 ;  //DMA_EN = 0
    
    >Enable DMA Int
      IER0 = 0x0100;     // enable  DMA int
    >Global Int Enable
      asm(" BIT (ST1, #ST1_INTM) = #0");
    >Start Record
      DMA1CH1TCR2 = 0xB084 ; //DMA_EN = 1
    
    

  • I am not sure on your conclusion on not having race around condition: What was your observation here ?

    These are two different frequency domain and as explained in the wiki page, there can also be a scenario, when the DSP does enter RTC-only mode, but WAKEUP is blocked from waking the device because of an un-cleared EXT INT flag in the RTC domain.

    Suggestion is to follow the mitigation procedure and check whether the issue mentioned goes away.

    Regards

     Vasanth

  • Vasanth,

    Thanks for your concern in solving the problem,let me be more clear,the problem is not with entering in to rtc mode and exiting,first of all i am not using RTC mode, i am using IDLE3 Mode


    i am able to wokeup from IDLE3 successfully,problem being faced is after wokeup i am not able to catch the DMA interrupt even though data is coming through DMA to chip the interrupt is also raised but the chip doesnt go to DMA isr(observed through debugger XDS100V1) , i am not using external wakeup,i am using alarm for wakeup,i am not even been blocked of entering IDLE3 Mode

    you can see my program flow in latest comments

    to explain you again here below it is in a nut shell

    disable_alarm();

    enable_dma();

    while(1)

    {

     if(dma_interrupt)

     {

     enable_alarm();

     goto_sleep();

     }

     if(alarm_interupt)

     {

     wakeup_sleep();

     do_something();

     reenable_dma();

     }

    }

    here alarm is a 5sec alarm and dma interrupt is 160ms,more over i have made them exclusive mutually,how can a race occur here ?

     what may be the case that DMA ISR is not serviced after wakeup,how come its serviced after putting a break point does putting a break point could unblock any interrupt flags ?? soon after i have stepped over the break point my code gets blocked at execution of idle instruction

     i am at a weird side of C55x your help is much appreciated

  • Hi DARAM,

    DMA configuration in your wake-up sequence looks fine. Any how you double check that, DMA interrupts are cleared in DMAIFR and IFR0 registers after wake-up and are properly enabled.

    Since you are controlling idle3 mode from DMA interrupt, give a try by not disabling MPORT in idle3 mode.

    Use IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|IPORT_IDLE|HWA_IDLE ;

    instead of IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|MPORT_IDLE|IPORT_IDLE|HWA_IDLE ;

     

    Also, once your system comes out of IDLE3 mode, you need to clear MPORTI bit in ICR register to make sure MPORT is not disabled due to any race condition.

    In general your idle3 enable/disable sequence with respect to ICR register should be as below

    enable_idle3:

    save ICR register ==>             icr_save = IDLE_ICR;

    Configure ICR register ==>    IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|MPORT_IDLE|IPORT_IDLE|HWA_IDLE;

    Execute idle instruction  ===> asm(" idle");

     

    Wakeup:

    Restore ICR register ==>    IDLE_ICR = icr_save;

     

    If you follow above sequence, your DMA should work fine even you disable MPORT during idle3 mode. It is always safe to set ICR to '0' when your system is in active state.

    - Pratap.

  • Pratap Reddy M V said:

    DMA configuration in your wake-up sequence looks fine. Any how you double check that, DMA interrupts are cleared in DMAIFR and IFR0 registers after wake-up and are properly enabled.

    i have rechecked the initialization part it is flaw less 

    Pratap Reddy M V said:

    Since you are controlling idle3 mode from DMA interrupt, give a try by not disabling MPORT in idle3 mode.

    Use IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|IPORT_IDLE|HWA_IDLE ;

    instead of IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|MPORT_IDLE|IPORT_IDLE|HWA_IDLE ;

     

    This Worked like a CHARM

    Pratap Reddy M V said:

    Also, once your system comes out of IDLE3 mode, you need to clear MPORTI bit in ICR register to make sure MPORT is not disabled due to any race condition.

    In general your idle3 enable/disable sequence with respect to ICR register should be as below

    enable_idle3:

    save ICR register ==>             icr_save = IDLE_ICR;

    Configure ICR register ==>    IDLE_ICR= CPU_IDLE|CLK_IDLE|DPORT_IDLE|XPORT_IDLE|MPORT_IDLE|IPORT_IDLE|HWA_IDLE;

    Execute idle instruction  ===> asm(" idle");

     

    Wakeup:

    Restore ICR register ==>    IDLE_ICR = icr_save;

     If you follow above sequence, your DMA should work fine even you disable MPORT during idle3 mode. It is always safe to set ICR to '0' when your system is in active state.

    this alone did not help but the MPORT tweak worked so my problem lies in reenabling DMA after idle through ICR what my be the solution for this by above solution i am just bypassing the disabling of DMA port isn't it ?

  • Looks like MPORT is not getting out of idle state after wakeup. When DSP core receives an interrupt signal, CPU, DPORT, XPORT, and IPORT domains are enabled automatically but MPORT needs to be enabled manually.

    Make sure DMA is stopped and DMA clocks are disabled completely before IDLE3 mode is enabled. DMA is not supposed to access any memory when MPORT being disabled.

    Make sure MPORTI bit in ICR is set to 0 after wakeup before re-enabling DMA. 

    From your code posted here I believe you are not enabling IDLE3 mode from interrupt context. If it is in interrupt context, please do it out side ISR.

    - Pratap.

  • Pratap Reddy M V said:

    Looks like MPORT is not getting out of idle state after wakeup. When DSP core receives an interrupt signal, CPU, DPORT, XPORT, and IPORT domains are enabled automatically but MPORT needs to be enabled manually.

    Make sure DMA is stopped and DMA clocks are disabled completely before IDLE3 mode is enabled. DMA is not supposed to access any memory when MPORT being disabled.

    Make sure MPORTI bit in ICR is set to 0 after wakeup before re-enabling DMA. 

    From your code posted here I believe you are not enabling IDLE3 mode from interrupt context. If it is in interrupt context, please do it out side ISR.

    i have seen when alarm interrupt occured the MPORT is not out of idle and i manually put out of idle even them DMA interrupt is not coming but dma data is changing in its destination that means DMA port is working nice but the DMA interrupt is not raised why so ? even if  all initialization of DMA is very proper

    below is dma initialization routines

    // DAM Controller out of Reset-done
    		// Enable DMA Clock in PCGCR1 & 2 - DONE
    		// Ensure that All DMA Interrupt Flags are Cleared
    		do
    		{
    		 DMAIFR = 0xFFFF ;
    		}while(DMAIFR & 0xFFFF == 0xFFFF );
    		// Enable DMA Interrupt in DMAIER Register
    		DMAIER = 0x00F0 ;  //DMA1
    		//Ensure all other Flags Cleared in IFRx
    		do
    		{
    		 temp=IFR0;
    		 IFR0=temp;
    		}while(!(IFR0 == 0));
    		do
    		{
    		temp=IFR1;
    		IFR1=temp;
    		}while(!(IFR1 == 0));
    
    RecvBuf = &g_DMA_RecodingBuf[0];
    		DMA1CH1TCR2 = 0x0080 ;	// DMA_EN = 0, Source Addr = Constant, Destn Add Auto Inc, Sync Mode
    		src_add = (Uint32)RecvBuf ;
    		if((src_add >= CSL_DMA_DARAM_START_ADDR)
    		              && (src_add <= CSL_DMA_DARAM_END_ADDR))
    		{
    			src_add = (src_add << CSL_DMA_ADDR_SHIFT) + CSL_DMA_DARAM_ADDR_OFFSET;
    		}
    		else if((src_add >= CSL_DMA_SARAM_START_ADDR)&& (src_add <= CSL_DMA_SARAM_END_ADDR))
    		{
    			src_add = (src_add << CSL_DMA_ADDR_SHIFT)+ CSL_DMA_SARAM_ADDR_OFFSET;
    		}
    		DMA1CH1DSAU = (Uint16) (src_add >> 16) ;
    		DMA1CH1DSAL = (Uint16) src_add ;
    		// Dest Address = I2S0 Address, No Inc
    
    		DMA1CH1SSAU = 0 ;
    		DMA1CH1SSAL = 0x2A28 ;	//I2S2_W0_LSW_R
    		//event sync..
    		// Select Event I2S0 to Trigger DMA in DMAnCESR
    		DMA1CESR1 = 0x0201 ;
    		DMA1CESR2 = 0x0000 ;
    		DMA1CH1TCR1 = DMA_RECORD_BUFFER_SIZE * 4 ;	// Length = 240
    		
    		DMA1CH1TCR2 = 0x3080 ;  //DMA_EN = 0

     

    the trick of not disabling MPORT before idle instruction is raising DMA interrupt but this particular technique is causing improper data (not desired data )from DMA after wakeup for atleast 10 transfers why so ? while i am properly initializing I2S also which is the SYNC event for DMA 

    so i thought leaving the trick and making DMA to work as desired is important,so finally why DMA interrupt is not occurring pretty messed with this

  • I don't see any issue with the code you have posted here. If possible, share your project files which are handling DMA/I2S configuration and IDLE3 mode control. Otherwise you can mail me here

    Try adding 6 NOP instructions before executing idle instruction and after configuring ICR to clear instruction pipeline. 

    - Pratap.

  • Hi DARAM and Pratap,

    I am facing a problem in setting up my device TMS320C5505 EVM in IDLE3 mode. I observe that when ICR idles the complete CPU domain (ICR = 0X3EF) then 1s RTC periodic interrupt fires for the first time but then when I loop back to enter IDLE mode again the device gets hung in IDLE mode. Before entering the IDLE mode my device has the DMA1, I2S, SPI and UART peripherals configured.  

    Also, when I do not IDLE the MPORT and configure rest of the ports to IDLE in ICR I observe the same as above.

    If ICR is configured only to idle the CPUI (i.e ICR = 0x000F) the device enter IDLE mode waits for the 1s interrupt, services the ISR but when looped back to enter mode the device does not IDLE and continues to execute the instructions after the IDLE instruction.

    Both the above scenarios occur when the PLL is NOT turned OFF else my device is hung on IDLE at the very first iteration. I have checked the IFR0 and IFR1 flags and no flag is being set. I also obeserve the RTCNOPWR flag gets set  in some debug trials. 

    Can anyone let me know if I am missing something.?

    void ConfigureInterruptRTC_FE(void)
    {
    	Uint16 timeOut = 1000;
    	/* Global Interrupt disable*/
    	IRQ_globalDisable();
    	/*Clear any pending interrupts*/
    	IRQ_clearAll();
    	/*Disable all the interrupts*/
    	IRQ_disableAll();
    	/*Clear events*/
    	IRQ_setVecs((Uint32)&VECSTART);
    	IRQ_clear(RTC_EVENT);
    	/*Plug the ISR address*/
    	IRQ_plug (RTC_EVENT, &Isr_rtc);
    	/*Enable RTC event*/
    	IRQ_enable(RTC_EVENT);
    	/*Enable global interrupts*/
    	IRQ_globalEnable();
    	RTC_reset();
    
    	/*Clear update bit*/
    	CSL_RTC_REGS->RTCUPDATE = 0;
    	/*Clear time register*/
    	CSL_RTC_REGS->RTCMIL   = 0;
    	CSL_RTC_REGS->RTCSEC   = 0;
    	CSL_RTC_REGS->RTCMIN   = 0;
    	CSL_RTC_REGS->RTCHOUR  = 0;
    	CSL_RTC_REGS->RTCDAY   = 0;
    	CSL_RTC_REGS->RTCMONTH = 0;
    	CSL_RTC_REGS->RTCYEAR  = 0;
    	/*Time updates enabled*/
    	CSL_RTC_REGS->RTCUPDATE |= CSL_RTC_RTCUPDATE_TIMEUPDT_MASK;
    	while(CSL_RTC_REGS->RTCUPDATE & 0x8000 && (--timeOut != 0));
    	/*Clear all RTC interrupt flags*/
    	CSL_RTC_REGS->RTCINTFL	=	(Uint16)0x803F;
    	/*Enable RTC periodic seconds interrupt to be triggered*/
    	EnableEventRTC_FE(CSL_RTC_SECEVENT_INTERRUPT);
    }
    
    static void SecIntc_rtc(void)
    {
    	CSL_FINST(CSL_RTC_REGS->RTCINTFL, RTC_RTCINTFL_SECFL, SET);
    	CSL_RTC_REGS->RTCINTREG = 0x0002;
    }
    
    Int16 TriggerIdleMode_FE(Uint16 sleepTime)
    {
    	/*Configure the RTC alarm interrupt*/
    	ConfigureInterruptRTC_FE();
    
    	/*Poll for DMA1 status of Transmitter Channel 2*/
    	while(CSL_DMA1_REGS->DMACH2TCR2 & (Uint16)0x4000);
    	CSL_DMA1_REGS->DMACH2TCR2 = CSL_DMA_CHANNEL_DISABLE;
    
    	/*Poll for DMA1 status of Receiver Channel 3*/
    	while(CSL_DMA1_REGS->DMACH3TCR2 & (Uint16)0x4000);
    	CSL_DMA1_REGS->DMACH3TCR2 = CSL_DMA_CHANNEL_DISABLE;
    	DMAIER = CSL_DMA_DMACH1TCR2_INTEN_DISABLE;
    	CSL_SYSCTRL_REGS->DMAIFR = CSL_SYS_DMAIFR_DMA1CH3IF_CLEAR;
    
    	/* USB peripheral domain is never enable. Directly disable the Oscillator */
    	USBSCR = (Uint16)0x804C;
    
    	/*Disable Timer 1*/
    	CSL_TIM_1_REGS->TCR = (Uint16)0x0000;
    
    	/*Disable I2S2 peripheral*/
    	CSL_I2S2_REGS->I2SSCTRL = (Uint16)0x0000;
    
    	/*Poll for SPI status and disable SPI clock*/
    	while(0x0006 != CSL_SPI_REGS->SPISTAT1);
    	CSL_SPI_REGS->SPICCR = CSL_SPI_SPICCR_RESETVAL;
    
    	/*Request to stop UART clock*/
    	 CSL_SYSCTRL_REGS->CLKSTOP |= CSL_SYS_CLKSTOP_URTCLKSTPREQ_MASK;
    	 while(!(CSL_SYSCTRL_REGS->CLKSTOP & CSL_SYS_CLKSTOP_URTCLKSTPACK_MASK));
    
    	/*Disable all clocks except SYSCLK and USB Clock*/
    	CSL_SYSCTRL_REGS->PCGCR2 = (Uint16)0x00FF;
    	CSL_SYSCTRL_REGS->PCGCR1 = (Uint16)0x7FFF;
    
    	/*Clearing all interrupt flags*/
    	CSL_CPU_REGS->IFR0 |= 0xFFFF;
    	CSL_CPU_REGS->IFR1 |= 0xFFFF;
    
    
        /* Bypass the PLL */
    //	CSL_FINST(CSL_SYSCTRL_REGS->CCR2, SYS_CCR2_SYSCLKSEL, BYPASS);
    //	CSL_FINST(CSL_SYSCTRL_REGS->CGCR1, SYS_CGCR1_PLL_PWRDN, POWERDWN);
    
    	/*Disabling the master clock*/
    	CSL_SYSCTRL_REGS->PCGCR1 |= 0x8000;
    	RTC_start();
    	do
    	{   /* Configure for Idle, enable idle on CPU domain*/
    		ICR = 0x016F;
    		asm("  nop");
    		asm("  nop");
    		asm("  nop");
    		asm("  idle");
    		asm("  nop");
    		asm("  nop");
    		asm("  nop");
    		TriggerHwWatchdog_FE();
    		temp1920 = CSL_RTC_REGS->RTCINTFL;
    		if((temp1920 & 0x0002) != (Uint16)0)
    		{
    			CSL_RTC_REGS->RTCINTFL = (Uint16)0x803F;
    		}
    	}while(--counter);
    
        /*Disable RTC Interrupts*/
    	DisableEventRTC_FE(RTC_SECEVENT_INTERRUPT);
    	RTC_stop();
    
    	/* Enable the PLL */
     // CSL_FINST(CSL_SYSCTRL_REGS->CGCR1, SYS_CGCR1_PLL_PWRDN, POWERED);
     // while (timeout--) ;
        /* Select pll */
     // CSL_FINST(CSL_SYSCTRL_REGS->CCR2, SYS_CCR2_SYSCLKSEL, LOCK);
    
    	/*Enable I2S2, SPI, UART, Timer1 and DMA1 clock, but gated all others' clocks */
    	CSL_SYSCTRL_REGS->PCGCR1 = (Uint16)0x2FD9;
    	CSL_SYSCTRL_REGS->PCGCR2 = (Uint16)0x0077;
    
        /* Clear UART stop request in the CLKSTOP register*/
        CSL_SYSCTRL_REGS->CLKSTOP = (Uint16)0x0000;
       
        return status;
    }
    
    

     

  • The issue was resolved offline. So updating the post with the resolution information. 

    With respect to RTCNOPWR flag getting set in some of the debug trials -   This shouldn’t happen and its not expected to get set. Suggestion was provided to remove the watch dog counter and check, as the suspecion was with respect to Watch dog counter.

    The issue got fixed after taking care of the watchdog in the code. Also, it was figured out why the stack was getting cleared. It was a bug in the code and was later fixed ".

    With this the C5505 - IDLE3 issue of entering to Idle3 mode and waking up through RTC Interrupts in repeated manner is resolved and code seems to be working fine.

    Regards

     Vasanth