Hi,
I have questions about SRIO of C6670.
In SRIO User Guide(sprugw1b) page.35 "Figure 2-1 Peripheral Module", there are 2 VBUSM Master(Direct IO and CDMA). Is these VBUS Master same meaning against "SRIO_M" and "SRIO Packet DMA"? "SRIO_M" and "SRIO Packet DMA" are written in C6670 datasheet(sprs689d) page.89 "Table 4-2 Switch Fabric Connection Matrix Section 2".
The following is what I want to know: DirectIO VBUSM Master = SRIO_M ? CDMA VBUSM Master = SRIO Packet DMA ?
If this is true, each VBUS Master are connected to Teranet, right? So, which are appropriate registers to configure bus priority for these VBUSM Master against the Teranet? Is it "Peripheral Settings Control Register(CBA_TRANS_PRI bit field) and "Priority Control Register" in SRIO?
I understood as follow: "Peripheral Settings Control Register(CBA_TRANS_PRI bit field) is for DirectIO VBUSM Master. "Priority Control Register" is for CDMA VBUSM Master. Is it correct?
One more question. PacketDMA inside SRIO and CDMA VBUSM Master are only used when "Messaging Passing" is used, is it correct?
best regards, g.f.
