This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Setting DSP clock frequency on DM3730

Other Parts Discussed in Thread: DM3730

I am developing an a DSPLink based application to run on a Gumstix Firestorm COM with a DM3730 processor.  I am able to manipulate the ARM clock frequency using the cpufreq interface in Linux but this seems to have no effect on the DSP clock frequency.  By reading the TSC register on the DSP it looks like it is currently running at 260MHz.  How can I go about modifying the IVA clock frequency to get the DSP running faster?  Also, our application is currently very limited by memory access as we are dealing with large amounts of data.  How is the memory bus clock speed set to ensure we are accessing DDR as efficiently as possible from the DSP?

Thanks,

Patrick

  • Hi Patrick,

    The IVA subsystem (DSP) of the Overo® FireSTORM COM board must be able to operates at 660 MHz if the ARM operates at 800 MHz. For some DM3730 based boards the DSP operates at 800 MHz if the ARM is clacked at 1 GHz.

    Therefore the DSP can running faster then 260 MHz but if the power management is enabled it is possible the DSP to be down-clocked to 260 MHz if it is not loaded. I suggest you to check the DSP frequency during the DSP is loaded.

    You can check the current cpu frequency by the following command:

    # cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq

    and all available cpu frequencies:

    # cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies

    The check of cpu frequency is important because there is a relation between CPU and DSP frequency.

    Also you can check the values of the registers described in the TRM section 5.2.1 Clocking, Reset, and Power-Management Scheme which can be found at the DM3730 product page.

    BR

    Tsvetolin Shulev

  • Thanks for the response.  I am currently running the ARM core at 1GHz with a call to cpufreq-set at startup.  I know this hurts the life of the product but for now we are trying to validate what we can do with it.  I am currently capturing the measurements with the DSP under load doing a large data processing task.  Is there a method to disable the power management to never clock down the DSP?

    Here is a brief description of how I am getting these measurements:

    We have a large block of optimized data processing code that is initiated by a DSPLink message queue message from Linux to the DSP.  The DSP executes the code block in ~120ms and responds with a DSPLink message to Linux.  I am capturing DSP time stamps from the TSC register before and after the data processing block.  This block is putting the DSP under load.  I am then comparing these TSC measurements to linux time captured before and after the processing begins.  I have tried extending the processing to take multiple seconds and done the measurements over the course of many iterations of the data processing.  The timing always comes out to the DSP core running at 260MHz.

    Thanks,

    Patrick