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USB3320 initialization

James Li
Intellectual 750 points

Other Parts Discussed in Thread: AM3715

Hi,

Sorry to start another thread of discussing USB3320 because I verified the answer from Carsten in my previous port.

Now I'm able to dump register values from USB3320 transceiver.

In our customized design, we added another USB3320 for port1 and enabled port1 in registry like this:

    "Port1Mode"=dword:1 ; Port 1 is supported now
    "Port1PwrGpio"=dword:60 ; GPIO_96
    "Port1PwrLevel"=dword:1
    "Port1RstGpio"=dword:39    ; GPIO_57

The hardware configuration is the same as Port2.

However, when I dump the register values from two USB3320 chips in InitializeEHCI function after ExternalDeviceDeassertReset(pPddObject);

There are some differences in register settings:

InitializeEHCI -------------------------------------------------------
DumpUSBTransceiver - port = 2
Port2 - Ulpi PHY Vendor ID Lo = 0x24
Port2 - Ulpi PHY Vendor ID High = 0x4
Port2 - Ulpi PHY Product ID Low = 0x7
Port2 - Ulpi PHY Product ID High = 0x0
Port2 - Ulpi PHY Function Control = 0x41
Port2 - Ulpi PHY Interface Control = 0x0
Port2 - Ulpi PHY OTG Control = 0x6
Port2 - Ulpi PHY Interrupt EnableRising = 0x1f
Port2 - Ulpi PHY Interrupt EnableFalling = 0x1f
Port2 - Ulpi PHY Interrupt Status = 0x4
DumpUSBTransceiver - port = 1
Port1 - Ulpi PHY Vendor ID Lo = 0x24
Port1 - Ulpi PHY Vendor ID High = 0x4
Port1 - Ulpi PHY Product ID Low = 0x7
Port1 - Ulpi PHY Product ID High = 0x0
Port1 - Ulpi PHY Function Control = 0x45
Port1 - Ulpi PHY Interface Control = 0x18
Port1 - Ulpi PHY OTG Control = 0x66
Port1 - Ulpi PHY Interrupt EnableRising = 0x1f
Port1 - Ulpi PHY Interrupt EnableFalling = 0x1f
Port1 - Ulpi PHY Interrupt Status = 0x4

The differences are in Function Control, Interface Control,  and OTG Control.

                             Function Control         Interface Control             OTG Control.

Port2                       0x41                           0x0                                 0x6

Port1                       0x45                           0x18                               0x66

I would expect to see exactly the same register settings in these two transceivers since the hardware configurations are the same.

Do you know where the code is to initialize USB3320 transceiver?

Thanks,

James

  • 0
    Expert 1450 points

    James,

    Apologies if I've missed it from your previous posts, but which CPU are you building for? OMAP35xx, AM33x, ...?

    Are you including other USB drivers in your image that may be interfering with the operation of the EHCI driver? For example, the MUSBOTG driver (omap_musbotg.dll), depending on build configuration may include the isp1504_usbotg library, which fires off a few setup commands on the ULPI interface.

    As far as I can see, the EHCI driver itself does not do any initialization of the transceiver apart from resetting it.

  • 0 in reply to Carsten Hansen
    Intellectual 750 points

    Hi Carsten,

    Thanks for answering my question.

    The CPU is AM3715. The customized design uses two USB33200 connecting to HSUAB1 and HSUSB2 respectively. Apart from ULPI interface, the hardware configurations for these two USB33200 chips are exactly the same.  And yes, from my understanding, the EHCI driver only resets the transceivers. That's why I'm confused that Register values from port2 USB33200 transceiver look like the reset values whereas the port1 transceiver register values are different from reset values.

    ISP1504 is for sure removed from build. We are using OTG from PMIC chip and it works fine.

    But I'll double check MUSBOTG driver.

    Thanks again,

    James