Launching kernel error

Sebastien ASTRUC

Expert 1040 points

Other Parts Discussed in Thread: OMAP-L138, AM1808, OMAPL138

Hi,

I downloaded kernel image into DDR2 at address 0xC0700000 with Ymodem exchange proposed by UBOOT (loady command).

But when I execute "bootm 0xC0700000", kernel is not launched.

----------------------------------------------------------------------------------------------

U-Boot > bootm 0xc0700000
## Booting kernel from Legacy Image at c0700000 ...
   Image Name:   Linux-3.3.0
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2397792 Bytes = 2.3 MiB
   Load Address: c0008000
   Entry Point: c0008000
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!
U-Boot >

----------------------------------------------------------------------------------------------

It's a problem of download? or kernel image?

Thanks

Best Regards

Sebastien

over 11 years ago

0 Titusrathinaraj Stalin over 11 years ago

TI__Guru** 116100 points

Hi,

Do you have ethernet connection or SD support on your target board?

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

I'll have ethernet later. During this time I try to download uImage by Ymodem.

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Ok, Please provide steps that followed by you.

The problem seems to be in image transfer.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

- I launch command and following text appears:

U-Boot > loady
## Ready for binary (ymodem) download to 0xC0700000 at 115200 bps...

- I do "Transfert", "Sendfile" on hyperterminal and I browse to my linux image and then a window of downloading appears.

- when ended, I launch :

bootm 0xC0700000

and this text appears :

-------------------------------------------------------------------------

## Booting kernel from Legacy Image at c0700000 ...
   Image Name:   Linux-3.3.0
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2397792 Bytes = 2.3 MiB
   Load Address: c0008000
   Entry Point: c0008000
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!

-------------------------------------------------------------------------

It's all right

And more, I send you all log on starting

-------------------------------------------------------------------------

OMAP-L138 LCDK initialization passed!
Booting TI User Boot Loader
        UBL Version: 1.65
        UBL Flashtype: NAND
Starting NAND Copy...
Valid magicnum, 0x55424CBB, found in block 0x00000006.
   DONE
Jumping to entry point at 0xC1080000.
NAND: 128 MiB
MMC:   davinci: 0
Bad block table not found for chip 0
Bad block table not found for chip 0
Bad block table written to 0x000007fe0000, version 0x01
Bad block table written to 0x000007fc0000, version 0x01
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ETH PHY detected!!!
Error: Ethernet init failed!
Board Net Initialization Failed
DaVinci-EMAC
Hit any key to stop autoboot: 0
Card did not respond to voltage select!
Unknown command 'sf' - try 'help'
Unknown command 'sf' - try 'help'
## Booting kernel from Legacy Image at c0700000 ...
   Image Name:   Linux-3.3.0
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2397792 Bytes = 2.3 MiB
   Load Address: c0008000
   Entry Point: c0008000
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!
U-Boot >

-------------------------------------------------------------------------

Thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Please refer the below Ti wiki for transferring files to RAM.

http://processors.wiki.ti.com/index.php/AM335x_U-Boot_User%27s_Guide#UART_2

I launch command and following text appears:

U-Boot > loady
## Ready for binary (ymodem) download to 0xC0700000 at 115200 bps...

- I do "Transfert", "Sendfile" on hyperterminal and I browse to my linux image and then a window of downloading appears.

- when ended, I launch :

bootm 0xC0700000

and this text appears :

Do not restart the board after loaded file into RAM since RAM get cleared once restarted.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

I don't restart board after downloading.

I have downloaded several times kernel image and after into UBOOT prompt, I exsecute command :

crc32 0xc070000 0x249660 -> addr and size of image

board responds :

CRC32 for c0700000 ... c094965f ==> 5bc808b5

It's always the same CRC.

Is it possible that the issue is into built image of kernel? This image works with EVM evaluation board AM1808.

My board is like LCDK board excepted I use UART1 instead of UART2!

Do I have to change ttyS2 to ttyS1? Is there a link with this?

Thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

I have downloaded several times kernel image and after into UBOOT prompt, I exsecute command :

crc32 0xc070000 0x249660 -> addr and size of image

board responds :

CRC32 for c0700000 ... c094965f ==> 5bc808b5

It's always the same CRC.

Don't do anything (downloading images through x/y/z modem) on the board.

Just simply restart your board and give "bootm 0xC0700000" directly, I hope that you will get the same error even you didn't download anything to RAM.

My board is like LCDK board excepted I use UART1 instead of UART2!

Do I have to change ttyS2 to ttyS1? Is there a link with this?

I hope not required.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

If I start board I get :

bootm 0xC0700000
Wrong Image Format for bootm command
ERROR: can't get kernel image!

It's normal because I lost image into DDR2!

Why did you say to do that? and why do you hope that result will be the same?

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Yes, You are right, It depends on hardware; some of the RESET preserves RAM.

I got the same error when I restarted the board,

Sorry for the misinterpretation.

I will try and let me update tomorrow.

Just try with "tera term" also.

0 Titusrathinaraj Stalin over 11 years ago in reply to Titusrathinaraj Stalin

TI__Guru** 116100 points

Hi,

I'm able to load kernel image through kermit.

1) Give "loadb" command in u-boot

2) In turbo term, Select "Transfer" option and choose kermit option to tranfer the "uImage" to the board.

PFA of screen shots.

Please try this and update the results.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Hi,

It doesn't work. I have this message:

----------------------------------------------

Bad Header Checksum
ERROR: can't get kernel image!

-----------------------------------------------

I download a uImage.bin. It's right?

And when I look at memory at 0xC0700000, I see data written.

----------------------------------------------------------------------------------------------

c0700000: 56190527 e6d4867b 29997952 60962400    '..V{...Ry.).$.`
c0700010: 008000c0 008000c0 6fbff44f 00020205    ........O..o....
c0700020: 756e694c 2e332d78 4e302e33 e1a00037    Linux-3.3.0N7...
c0700030: e1a00000 e1a00000 e1a00000 e1a00000    ................
c0700040: e1a00000 e1a00000 e1a00000 ea000002    ................
c0700050: 016f2818 6000244e 01002496 02e1a070    .(o.N$.`.$..p...

----------------------------------------------------------------------------------------------

Regards

Sebastien

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

I see datas are the same but into .bin and DDR; datas are encoded in little endian into DDR2 (I think) and big endian into .bin.

Is this the reason about CRC error?

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

Sorry, I said wrong things.

Sometimes downloading doesn't finish itself.

Do you think there is a problem onto DDR2 (bad settings)? or other things in relation with the downloading interrupts?

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Have you tried to load the 'uImage' image through "loadb" ?

Are you getting any error while transferring image and got succeed ?

Attach your screen shots.

Also attach your "omapl138_lcdk.h" located at 'include/configs/omapl138_lcdk.h' & board/davinci/da8xxevm/omapl138_lcdk.c else attach you config file as per your hw.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Yes.

When downloading finished itself, it says me that size is 0x249677. My uImage does 0x2496A0!!

No error during transferring but sometime transferring stops.

Sometimes my board reboots.

Fullscreen 1423.omapl138_lcdk.c Download

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Based on da850evm.c. Original Copyrights follow:
 *
 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <common.h>
#include <i2c.h>
#include <net.h>
#include <netdev.h>
#include <spi.h>
#include <spi_flash.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/davinci_misc.h>
#ifdef CONFIG_DAVINCI_MMC
#include <mmc.h>
#include <asm/arch/sdmmc_defs.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

#define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])

#ifdef CONFIG_DAVINCI_MMC
/* MMC0 pin muxer settings */
const struct pinmux_config mmc0_pins[] = {
	/* GP0[11] is required for SD to work on Rev 3 EVMs */
	{ pinmux(0),  8, 4 },	/* GP0[11] */
	{ pinmux(10), 2, 0 },	/* MMCSD0_CLK */
	{ pinmux(10), 2, 1 },	/* MMCSD0_CMD */
	{ pinmux(10), 2, 2 },	/* MMCSD0_DAT_0 */
	{ pinmux(10), 2, 3 },	/* MMCSD0_DAT_1 */
	{ pinmux(10), 2, 4 },	/* MMCSD0_DAT_2 */
	{ pinmux(10), 2, 5 },	/* MMCSD0_DAT_3 */
	/* LCDK supports only 4-bit mode, remaining pins are not configured */
};
#endif

/* UART pin muxer settings */
static const struct pinmux_config uart_pins[] = {
	{ pinmux(0), 4, 6 },
	{ pinmux(0), 4, 7 },
	{ pinmux(4), 2, 4 },
	{ pinmux(4), 2, 5 }
};

#ifdef CONFIG_DRIVER_TI_EMAC
static const struct pinmux_config emac_pins[] = {
	{ pinmux(2), 8, 1 },
	{ pinmux(2), 8, 2 },
	{ pinmux(2), 8, 3 },
	{ pinmux(2), 8, 4 },
	{ pinmux(2), 8, 5 },
	{ pinmux(2), 8, 6 },
	{ pinmux(2), 8, 7 },
	{ pinmux(3), 8, 0 },
	{ pinmux(3), 8, 1 },
	{ pinmux(3), 8, 2 },
	{ pinmux(3), 8, 3 },
	{ pinmux(3), 8, 4 },
	{ pinmux(3), 8, 5 },
	{ pinmux(3), 8, 6 },
	{ pinmux(3), 8, 7 },
	{ pinmux(4), 8, 0 },
	{ pinmux(4), 8, 1 }
};
#endif /* CONFIG_DRIVER_TI_EMAC */

/* I2C pin muxer settings */
static const struct pinmux_config i2c_pins[] = {
	{ pinmux(4), 2, 2 },
	{ pinmux(4), 2, 3 }
};

#ifdef CONFIG_NAND_DAVINCI
const struct pinmux_config nand_pins[] = {
	{ pinmux(7), 1, 1 },
	{ pinmux(7), 1, 2 },
	{ pinmux(7), 1, 4 },
	{ pinmux(7), 1, 5 },
	{ pinmux(8), 1, 0 },
	{ pinmux(8), 1, 1 },
	{ pinmux(8), 1, 2 },
	{ pinmux(8), 1, 3 },
	{ pinmux(8), 1, 4 },
	{ pinmux(8), 1, 5 },
	{ pinmux(8), 1, 6 },
	{ pinmux(8), 1, 7 },
	{ pinmux(9), 1, 0 },
	{ pinmux(9), 1, 1 },
	{ pinmux(9), 1, 2 },
	{ pinmux(9), 1, 3 },
	{ pinmux(9), 1, 4 },
	{ pinmux(9), 1, 5 },
	{ pinmux(9), 1, 6 },
	{ pinmux(9), 1, 7 },
	{ pinmux(12), 1, 5 },
	{ pinmux(12), 1, 6 }
};

#endif

#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
#define HAS_RMII 1
#else
#define HAS_RMII 0
#endif

static const struct pinmux_resource pinmuxes[] = {
	PINMUX_ITEM(uart_pins),
	PINMUX_ITEM(i2c_pins),
#ifdef CONFIG_NAND_DAVINCI
	PINMUX_ITEM(nand_pins),
#endif
};

static const struct lpsc_resource lpsc[] = {
	{ DAVINCI_LPSC_AEMIF },	/* NAND, NOR */
	{ DAVINCI_LPSC_SPI1 },	/* Serial Flash */
	{ DAVINCI_LPSC_EMAC },	/* image download */
	{ DAVINCI_LPSC_UART1/*DAVINCI_LPSC_UART2*/ },	/* console */ //SEB
	{ DAVINCI_LPSC_GPIO },
#ifdef CONFIG_DAVINCI_MMC
	{ DAVINCI_LPSC_MMC_SD },
#endif		
};

#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
#define CONFIG_DA850_EVM_MAX_CPU_CLK	456000000
#endif

/*
 * get_board_rev() - setup to pass kernel board revision information
 * Returns:
 * bit[0-3]	Maximum cpu clock rate supported by onboard SoC
 *		0000b - 300 MHz
 *		0001b - 372 MHz
 *		0010b - 408 MHz
 *		0011b - 456 MHz
 */
u32 get_board_rev(void)
{
	return 0;
}

int board_early_init_f(void)
{
	/*
	 * Power on required peripherals
	 * ARM does not have access by default to PSC0 and PSC1
	 * assuming here that the DSP bootloader has set the IOPU
	 * such that PSC access is available to ARM
	 */
	if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
		return 1;

	return 0;
}

int board_init(void)
{
	unsigned int temp;
#ifndef CONFIG_USE_IRQ
	irq_init();
#endif

	/* arch number of the board */
	gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;

	/* address of boot parameters */
	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;


	/* setup the SUSPSRC for ARM to control emulation suspend */
	writel(readl(&davinci_syscfg_regs->suspsrc) &
	       ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
		 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
		 /*DAVINCI_SYSCFG_SUSPSRC_UART1*/DAVINCI_SYSCFG_SUSPSRC_UART1),//SEB
	       &davinci_syscfg_regs->suspsrc);

	/* configure pinmux settings */
	if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
		return 1;

#ifdef CONFIG_NAND_DAVINCI
	/*
	 * NAND CS setup - cycle counts based on da850evm NAND timings in the
	 * Linux kernel @ 25MHz EMIFA
	 */
	writel((DAVINCI_ABCR_WSETUP(15) |
		DAVINCI_ABCR_WSTROBE(63) |
		DAVINCI_ABCR_WHOLD(7) |
		DAVINCI_ABCR_RSETUP(15) |
		DAVINCI_ABCR_RSTROBE(63) |
		DAVINCI_ABCR_RHOLD(7) |
		DAVINCI_ABCR_TA(3) |
		DAVINCI_ABCR_ASIZE_16BIT),
	       &davinci_emif_regs->ab2cr); /* CS3 */
#endif


#ifdef CONFIG_DAVINCI_MMC
	if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
		return 1;
#endif

#ifdef CONFIG_DRIVER_TI_EMAC
	if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
		return 1;
	davinci_emac_mii_mode_sel(HAS_RMII);
#endif /* CONFIG_DRIVER_TI_EMAC */

	/* enable the console UART */
	writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
		DAVINCI_UART_PWREMU_MGMT_UTRST),
	       /*&davinci_uart1_ctrl_regs->pwremu_mgmt*/&davinci_uart1_ctrl_regs->pwremu_mgmt);//SEB

	return 0;
}

#ifdef CONFIG_DRIVER_TI_EMAC

/*
 * Initializes on-board ethernet controllers.
 */
int board_eth_init(bd_t *bis)
{
	if (!davinci_emac_initialize()) {
		printf("Error: Ethernet init failed!\n");
		return -1;
	}

	return 0;
}

#endif /* CONFIG_DRIVER_TI_EMAC */

#define CFG_MAC_ADDR_SPI_BUS	0
#define CFG_MAC_ADDR_SPI_CS	0
#define CFG_MAC_ADDR_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
#define CFG_MAC_ADDR_SPI_MODE	SPI_MODE_3

#define CFG_MAC_ADDR_OFFSET	(flash->size - SZ_64K)

static int  get_mac_addr(u8 *addr)
{
	/* Need to find a way to get MAC ADDRESS */
	return 0;
}

void dsp_lpsc_on(unsigned domain, unsigned int id)
{
	dv_reg_p mdstat, mdctl, ptstat, ptcmd;
	struct davinci_psc_regs *psc_regs;

	psc_regs = davinci_psc0_regs;
	mdstat = &psc_regs->psc0.mdstat[id];
	mdctl = &psc_regs->psc0.mdctl[id];
	ptstat = &psc_regs->ptstat;
	ptcmd = &psc_regs->ptcmd;

	while (*ptstat & (0x1 << domain))
		;

	if ((*mdstat & 0x1f) == 0x03)
		return;                 /* Already on and enabled */

	*mdctl |= 0x03;

	*ptcmd = 0x1 << domain;

	while (*ptstat & (0x1 << domain))
		;
	while ((*mdstat & 0x1f) != 0x03)
		;		/* Probably an overkill... */
}

static void dspwake(void)
{
	unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;

	/* if the device is ARM only, return */
	if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
		return;

	if (!strcmp(getenv("dspwake"), "no"))
		return;

	*resetvect++ = 0x1E000; /* DSP Idle */
	/* clear out the next 10 words as NOP */
	memset(resetvect, 0, sizeof(unsigned) * 10);

	/* setup the DSP reset vector */
	REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;

	dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
	REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
}

#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
/**
 * rmii_hw_init
 *
 */
int rmii_hw_init(void)
{
	return 0;
}
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */

int misc_init_r(void)
{
	uint8_t tmp[20], addr[10];


	if (getenv("ethaddr") == NULL) {
		/* Read Ethernet MAC address from EEPROM */
		if (dvevm_read_mac_address(addr)) {
			/* Set Ethernet MAC address from EEPROM */
			davinci_sync_env_enetaddr(addr);
		} else {
			get_mac_addr(addr);
		}

		if (is_multicast_ether_addr(addr) || is_zero_ether_addr(addr)) {
			printf("Invalid MAC address read.\n");
			return -EINVAL;
		}
		sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x", addr[0],
				addr[1], addr[2], addr[3], addr[4], addr[5]);

		setenv("ethaddr", (char *)tmp);
	}
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	/* Select RMII fucntion through the expander */
	if (rmii_hw_init())
		printf("RMII hardware init failed!!!\n");
#endif

	dspwake();

	return 0;
}

#ifdef CONFIG_DAVINCI_MMC
static struct davinci_mmc mmc_sd0 = {
	.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
	.host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
	.version = MMC_CTLR_VERSION_2,
};

int board_mmc_init(bd_t *bis)
{
	mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);

	/* Add slot-0 to mmc subsystem */
	return davinci_mmc_init(bis, &mmc_sd0);
}
#endif

6253.omapl138_lcdk.h

Fullscreen 5658.omapl138_lcdk.c Download

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Based on da850evm.c. Original Copyrights follow:
 *
 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <common.h>
#include <i2c.h>
#include <net.h>
#include <netdev.h>
#include <spi.h>
#include <spi_flash.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/davinci_misc.h>
#ifdef CONFIG_DAVINCI_MMC
#include <mmc.h>
#include <asm/arch/sdmmc_defs.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

#define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])

#ifdef CONFIG_DAVINCI_MMC
/* MMC0 pin muxer settings */
const struct pinmux_config mmc0_pins[] = {
	/* GP0[11] is required for SD to work on Rev 3 EVMs */
	{ pinmux(0),  8, 4 },	/* GP0[11] */
	{ pinmux(10), 2, 0 },	/* MMCSD0_CLK */
	{ pinmux(10), 2, 1 },	/* MMCSD0_CMD */
	{ pinmux(10), 2, 2 },	/* MMCSD0_DAT_0 */
	{ pinmux(10), 2, 3 },	/* MMCSD0_DAT_1 */
	{ pinmux(10), 2, 4 },	/* MMCSD0_DAT_2 */
	{ pinmux(10), 2, 5 },	/* MMCSD0_DAT_3 */
	/* LCDK supports only 4-bit mode, remaining pins are not configured */
};
#endif

/* UART pin muxer settings */
static const struct pinmux_config uart_pins[] = {
	{ pinmux(0), 4, 6 },
	{ pinmux(0), 4, 7 },
	{ pinmux(4), 2, 4 },
	{ pinmux(4), 2, 5 }
};

#ifdef CONFIG_DRIVER_TI_EMAC
static const struct pinmux_config emac_pins[] = {
	{ pinmux(2), 8, 1 },
	{ pinmux(2), 8, 2 },
	{ pinmux(2), 8, 3 },
	{ pinmux(2), 8, 4 },
	{ pinmux(2), 8, 5 },
	{ pinmux(2), 8, 6 },
	{ pinmux(2), 8, 7 },
	{ pinmux(3), 8, 0 },
	{ pinmux(3), 8, 1 },
	{ pinmux(3), 8, 2 },
	{ pinmux(3), 8, 3 },
	{ pinmux(3), 8, 4 },
	{ pinmux(3), 8, 5 },
	{ pinmux(3), 8, 6 },
	{ pinmux(3), 8, 7 },
	{ pinmux(4), 8, 0 },
	{ pinmux(4), 8, 1 }
};
#endif /* CONFIG_DRIVER_TI_EMAC */

/* I2C pin muxer settings */
static const struct pinmux_config i2c_pins[] = {
	{ pinmux(4), 2, 2 },
	{ pinmux(4), 2, 3 }
};

#ifdef CONFIG_NAND_DAVINCI
const struct pinmux_config nand_pins[] = {
	{ pinmux(7), 1, 1 },
	{ pinmux(7), 1, 2 },
	{ pinmux(7), 1, 4 },
	{ pinmux(7), 1, 5 },
	{ pinmux(8), 1, 0 },
	{ pinmux(8), 1, 1 },
	{ pinmux(8), 1, 2 },
	{ pinmux(8), 1, 3 },
	{ pinmux(8), 1, 4 },
	{ pinmux(8), 1, 5 },
	{ pinmux(8), 1, 6 },
	{ pinmux(8), 1, 7 },
	{ pinmux(9), 1, 0 },
	{ pinmux(9), 1, 1 },
	{ pinmux(9), 1, 2 },
	{ pinmux(9), 1, 3 },
	{ pinmux(9), 1, 4 },
	{ pinmux(9), 1, 5 },
	{ pinmux(9), 1, 6 },
	{ pinmux(9), 1, 7 },
	{ pinmux(12), 1, 5 },
	{ pinmux(12), 1, 6 }
};

#endif

#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
#define HAS_RMII 1
#else
#define HAS_RMII 0
#endif

static const struct pinmux_resource pinmuxes[] = {
	PINMUX_ITEM(uart_pins),
	PINMUX_ITEM(i2c_pins),
#ifdef CONFIG_NAND_DAVINCI
	PINMUX_ITEM(nand_pins),
#endif
};

static const struct lpsc_resource lpsc[] = {
	{ DAVINCI_LPSC_AEMIF },	/* NAND, NOR */
	{ DAVINCI_LPSC_SPI1 },	/* Serial Flash */
	{ DAVINCI_LPSC_EMAC },	/* image download */
	{ DAVINCI_LPSC_UART1/*DAVINCI_LPSC_UART2*/ },	/* console */ //SEB
	{ DAVINCI_LPSC_GPIO },
#ifdef CONFIG_DAVINCI_MMC
	{ DAVINCI_LPSC_MMC_SD },
#endif		
};

#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
#define CONFIG_DA850_EVM_MAX_CPU_CLK	456000000
#endif

/*
 * get_board_rev() - setup to pass kernel board revision information
 * Returns:
 * bit[0-3]	Maximum cpu clock rate supported by onboard SoC
 *		0000b - 300 MHz
 *		0001b - 372 MHz
 *		0010b - 408 MHz
 *		0011b - 456 MHz
 */
u32 get_board_rev(void)
{
	return 0;
}

int board_early_init_f(void)
{
	/*
	 * Power on required peripherals
	 * ARM does not have access by default to PSC0 and PSC1
	 * assuming here that the DSP bootloader has set the IOPU
	 * such that PSC access is available to ARM
	 */
	if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
		return 1;

	return 0;
}

int board_init(void)
{
	unsigned int temp;
#ifndef CONFIG_USE_IRQ
	irq_init();
#endif

	/* arch number of the board */
	gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;

	/* address of boot parameters */
	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;


	/* setup the SUSPSRC for ARM to control emulation suspend */
	writel(readl(&davinci_syscfg_regs->suspsrc) &
	       ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
		 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
		 /*DAVINCI_SYSCFG_SUSPSRC_UART1*/DAVINCI_SYSCFG_SUSPSRC_UART1),//SEB
	       &davinci_syscfg_regs->suspsrc);

	/* configure pinmux settings */
	if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
		return 1;

#ifdef CONFIG_NAND_DAVINCI
	/*
	 * NAND CS setup - cycle counts based on da850evm NAND timings in the
	 * Linux kernel @ 25MHz EMIFA
	 */
	writel((DAVINCI_ABCR_WSETUP(15) |
		DAVINCI_ABCR_WSTROBE(63) |
		DAVINCI_ABCR_WHOLD(7) |
		DAVINCI_ABCR_RSETUP(15) |
		DAVINCI_ABCR_RSTROBE(63) |
		DAVINCI_ABCR_RHOLD(7) |
		DAVINCI_ABCR_TA(3) |
		DAVINCI_ABCR_ASIZE_16BIT),
	       &davinci_emif_regs->ab2cr); /* CS3 */
#endif


#ifdef CONFIG_DAVINCI_MMC
	if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
		return 1;
#endif

#ifdef CONFIG_DRIVER_TI_EMAC
	if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
		return 1;
	davinci_emac_mii_mode_sel(HAS_RMII);
#endif /* CONFIG_DRIVER_TI_EMAC */

	/* enable the console UART */
	writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
		DAVINCI_UART_PWREMU_MGMT_UTRST),
	       /*&davinci_uart1_ctrl_regs->pwremu_mgmt*/&davinci_uart1_ctrl_regs->pwremu_mgmt);//SEB

	return 0;
}

#ifdef CONFIG_DRIVER_TI_EMAC

/*
 * Initializes on-board ethernet controllers.
 */
int board_eth_init(bd_t *bis)
{
	if (!davinci_emac_initialize()) {
		printf("Error: Ethernet init failed!\n");
		return -1;
	}

	return 0;
}

#endif /* CONFIG_DRIVER_TI_EMAC */

#define CFG_MAC_ADDR_SPI_BUS	0
#define CFG_MAC_ADDR_SPI_CS	0
#define CFG_MAC_ADDR_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
#define CFG_MAC_ADDR_SPI_MODE	SPI_MODE_3

#define CFG_MAC_ADDR_OFFSET	(flash->size - SZ_64K)

static int  get_mac_addr(u8 *addr)
{
	/* Need to find a way to get MAC ADDRESS */
	return 0;
}

void dsp_lpsc_on(unsigned domain, unsigned int id)
{
	dv_reg_p mdstat, mdctl, ptstat, ptcmd;
	struct davinci_psc_regs *psc_regs;

	psc_regs = davinci_psc0_regs;
	mdstat = &psc_regs->psc0.mdstat[id];
	mdctl = &psc_regs->psc0.mdctl[id];
	ptstat = &psc_regs->ptstat;
	ptcmd = &psc_regs->ptcmd;

	while (*ptstat & (0x1 << domain))
		;

	if ((*mdstat & 0x1f) == 0x03)
		return;                 /* Already on and enabled */

	*mdctl |= 0x03;

	*ptcmd = 0x1 << domain;

	while (*ptstat & (0x1 << domain))
		;
	while ((*mdstat & 0x1f) != 0x03)
		;		/* Probably an overkill... */
}

static void dspwake(void)
{
	unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;

	/* if the device is ARM only, return */
	if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
		return;

	if (!strcmp(getenv("dspwake"), "no"))
		return;

	*resetvect++ = 0x1E000; /* DSP Idle */
	/* clear out the next 10 words as NOP */
	memset(resetvect, 0, sizeof(unsigned) * 10);

	/* setup the DSP reset vector */
	REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;

	dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
	REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
}

#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
/**
 * rmii_hw_init
 *
 */
int rmii_hw_init(void)
{
	return 0;
}
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */

int misc_init_r(void)
{
	uint8_t tmp[20], addr[10];


	if (getenv("ethaddr") == NULL) {
		/* Read Ethernet MAC address from EEPROM */
		if (dvevm_read_mac_address(addr)) {
			/* Set Ethernet MAC address from EEPROM */
			davinci_sync_env_enetaddr(addr);
		} else {
			get_mac_addr(addr);
		}

		if (is_multicast_ether_addr(addr) || is_zero_ether_addr(addr)) {
			printf("Invalid MAC address read.\n");
			return -EINVAL;
		}
		sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x", addr[0],
				addr[1], addr[2], addr[3], addr[4], addr[5]);

		setenv("ethaddr", (char *)tmp);
	}
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	/* Select RMII fucntion through the expander */
	if (rmii_hw_init())
		printf("RMII hardware init failed!!!\n");
#endif

	dspwake();

	return 0;
}

#ifdef CONFIG_DAVINCI_MMC
static struct davinci_mmc mmc_sd0 = {
	.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
	.host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
	.version = MMC_CTLR_VERSION_2,
};

int board_mmc_init(bd_t *bis)
{
	mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);

	/* Add slot-0 to mmc subsystem */
	return davinci_mmc_init(bis, &mmc_sd0);
}
#endif

--------------------------------------------------------------------------------------------

loadb
## Ready for binary (kermit) download to 0xC0700000 at 115200 bps...
## Total Size = 0x00249677 = 2397815 Bytes
## Start Addr = 0xC0700000
U-Boot > bootm 0xc0700000
## Booting kernel from Legacy Image at c0700000 ...
Bad Header Checksum
ERROR: can't get kernel image!

--------------------------------------------------------------------------------------------

thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

I'm suspecting on DDR configuration register as per your DDR2 memory.

Please update your DDR2 values in the following file.

arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S

Change all the required values as you did for sfh tool.

SDTIM0:
   .word   0x20000010
SDTIM0_VAL_162MHz:
   .word   0x28923211
SDTIM1:
   .word   0x20000014
SDTIM1_VAL_162MHz:
   .word   0x0016c722
VTPIOCR:
   .word   0x200000f0   /* VTP IO Control register */
DDRVTPR:
   .word   0x01c42030   /* DDR VPTR MMR */
VTP_MMR0:
   .word   0x201f
VTP_MMR1:
   .word   0xa01f

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Hi,

I don't know what to put into these registers. For sfh I put values only on these registers :

- SDCR

- SDRCR

- SDTIMR1

- SDTIMR2

- DRPYC1R

2. My DDR2 DDR2 works in 150Mhz and is located to 0xC0000000. In file lowlevel_init.S I see :

DD2_START_ADDR :

.word 0x80000000

3.for example what is the difference between SDTIM0 and SDTIM0_VAL_162MHZ

7558.lowlevel_init.S

Thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Are you able to solve the problem?

Please try to probe RESET line to check whether the RESET is appearing while you transferring files,

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Hi,

RESET pin is ok. But I have the 1.2V which supplies core of OMAPL138 is bad. There is a ramp. I think that is the reason.

I don't still have explanation about bad transferring kernel by Kemit protocol ( "loadb command with UBOOT") with error CRC.

Regards

Thanks

Sebastien

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Try to load less size images (KB) than uImage (MB) or uboot scripts to RAM and execute the script through 'run' command.

http://www.denx.de/wiki/view/DULG/UBootCmdGroupExec

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

I transferred u-boot.bin at 0xC0700000; which is logically the same existing in flash memory.

There are little differences into memory. That's explain CRC error.

But why I have these differences?

- bad configuration of DDR2! but uboot correctly runs into DDR2.

- ....

Thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Yes you are correct,

DDR works good for running u-boot right !

Actually u-boot running at C1080000 of DDR

Just try to load & run u-boot scripts on DDR C0700000 addr

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

I did what you have said me and UBOOT doesn't launch.

same messages appear and restart indefinitely

Here log :

---------------------------------------------------------------------------------------

...

---------------------------------------------------------------------------------------

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

Sorry

I did an error of manipulation.

There is no reboot, just this message but after nothing:

---------------------------------------------------------------------------------------

----------------------------------------------------------------------------------------

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

I'am seeing my DDR2 have 8 banks. It's perhaps the problem.

And too, when I set configuration about DDR2 to 8 banks; sfh doesn't transfer data to card :

old cfg :

status |= DEVICE_ExternalMemInit(0x000000c5,0x00134a22,0x2c927209,0x7013f924,0x000002ee,0x00000000)

new cfg:

status |= DEVICE_ExternalMemInit(0x000000c5,0x00134a32,0x2c927209,0x7013f924,0x000002ee,0x00000000)

regards

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

Sorry,

DDR2 have 4 banks but electronic schematics can accept a 8 banks memory.

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

C0700000 address only for kernel,

C1080000 address only for u-boot,

So, Don't change the address.

To test the "C0700000" location,

1) Create new file called "example.script" and write the below lines in it.

echo
echo Network Configuration:
echo ----------------------
echo Target:
printenv ipaddr
echo
echo Server:
printenv serverip
echo

2) Convert into uboot script by following command.

mkimage -A ppc -O linux -T script -C none -a 0 -e 0 -n "autoscr example script" -d example.script example.scr

3) Run the "example.scr" script into RAM.

source C0700000

LOG

U-Boot 2009.11 (Jul 17 2012 - 16:59:18)

I2C:   ready
DRAM: 64 MB
MMC:   davinci: 0
In:    serial
Out:   serial
Err:   serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
Net:   Ethernet PHY: GENERIC @ 0x00

Hit any key to stop autoboot: 0
U-Boot >
U-Boot >
U-Boot >
U-Boot >
U-Boot >
U-Boot > tftpboot example.scr
Using device
TFTP from server 10.100.1.72; our IP address is 10.100.1.103
Filename 'example.scr'.
Load address: 0xc0700000
Loading: #
done
Bytes transferred = 203 (cb hex)
U-Boot > source C0700000
## Executing script at c0700000

Network Configuration:
----------------------
Target:
ipaddr=10.100.1.103

Server:
serverip=10.100.1.72

U-Boot >

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Ok but I don't still have ethernet neither SDCARD communications.

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

U-Boot > tftpboot example.scr

Instead this , Use your kermit download. (loadb)

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Here you have what I see on board:

----------------------------------------------------------

U-Boot > source c0700000
## Executing script at c0700000
cmd -> mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n autoscr example s
cript -d example.script example.scr
Network Configuration:
----------------------
Target:
" not definedaddr
' - try 'help'd 'echo
Server:
" not definedrverip
' - try 'help'd 'echo
' - try 'help'd '
' - try 'help'd '

----------------------------------------------------------

it's the good syntax?

Here you have what I see on host when I execute this cmd:

I changed ppc by arm.

----------------------------------------------------------

mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "autoscr example script" -d example.script example.scr
Image Name:   autoscr example script
Created:      Mon Jun 2 15:04:51 2014
Image Type:   ARM Linux Script (uncompressed)
Data Size:    273 Bytes = 0.27 kB = 0.00 MB
Load Address: 0x00000000
Entry Point: 0x00000000
Contents:
   Image 0:      265 Bytes =    0 kB = 0 MB

----------------------------------------------------------

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

for helping; data to DDR2 memory at 0xc0700000

-----------------------------------------------------------------------------------------------------------

U-Boot > md.b c0700000 256
c0700000: 27 05 19 56 fd 4a a3 5d 53 8c 76 73 00 00 01 11    '..V.J.]S.vs....
c0700010: 00 00 00 00 00 00 00 00 49 a1 d9 df 05 02 06 00    ........I.......
c0700020: 61 75 74 6f 73 63 72 20 65 78 61 6d 70 6c 65 20    autoscr example
c0700030: 73 63 72 69 70 74 00 00 00 00 00 00 00 00 00 00    script..........
c0700040: 00 00 01 09 00 00 00 00 65 63 68 6f 20 63 6d 64    ........echo cmd
c0700050: 20 2d 3e 20 22 6d 6b 69 6d 61 67 65 20 2d 41 20     -> "mkimage -A
c0700060: 61 72 6d 20 2d 4f 20 6c 69 6e 75 78 20 2d 54 20    arm -O linux -T
c0700070: 73 63 72 69 70 74 20 2d 43 20 6e 6f 6e 65 20 2d    script -C none -
c0700080: 61 20 30 20 2d 65 20 30 20 20 2d 6e 20 22 61 75    a 0 -e 0 -n "au
c0700090: 74 6f 73 63 72 20 65 78 61 6d 70 6c 65 20 73 63    toscr example sc
c07000a0: 72 69 70 74 22 20 20 2d 64 20 65 78 61 6d 70 6c    ript" -d exampl
c07000b0: 65 2e 73 63 72 69 70 74 20 65 78 61 6d 70 6c 65    e.script example
c07000c0: 2e 73 63 72 22 0d 0a 65 63 68 6f 20 4e 65 74 77    .scr"..echo Netw
c07000d0: 6f 72 6b 20 43 6f 6e 66 69 67 75 72 61 74 69 6f    ork Configuratio
c07000e0: 6e 3a 0d 0a 65 63 68 6f 20 2d 2d 2d 2d 2d 2d 2d    n:..echo -------
c07000f0: 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 0d    ---------------.
c0700100: 0a 65 63 68 6f 20 54 61 72 67 65 74 3a 0d 0a 70    .echo Target:..p
c0700110: 72 69 6e 74 65 6e 76 20 69 70 61 64 64 72 0d 0a    rintenv ipaddr..
c0700120: 65 63 68 6f 0d 0a 65 63 68 6f 20 53 65 72 76 65    echo..echo Serve
c0700130: 72 3a 0d 0a 70 72 69 6e 74 65 6e 76 20 73 65 72    r:..printenv ser
c0700140: 76 65 72 69 70 0d 0a 65 63 68 6f 0d 0a 0d 0a 0d    verip..echo.....

-----------------------------------------------------------------------------------------------------------

I created environment variables ipaddr & serverip!

Thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

It means, the less size code has able to execute in DDR.

How many banks are avail in your DDR and how about in hw configuration (mapping) ?

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

How many banks are avail in your DDR

4 banks

how about in hw configuration (mapping) ?

sorry I don't understand. I can use a DDR with 8 banks but it's not necessary. I dont know mapping; it's which one delivered by mcsdk_1_01_00_02.

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

I think undestanding the issue.

I changed "define " into omapl138_lcdk.h" because my SDRAM do :

- 512 Mbits -> 64MBytes

- 4 banks of 16MBytes

In the lcdk I saw there is one bank but it's not enough for me because I have 16MB on 1 bank. I don't undestand how uboot works into DDR at 0xc108 0000 because it's the second bank.

What can I do to set omapl138_lcdk board with 4 banks? I think I have to add function into omapl138_lcdk.c

inti .h I added:

PHY_SDRAM_2

PHY_SDRAM_2_SIZE

up to 4.

I changed CONFIG_NB_DRAM_BANKS 4

thanks

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

So, Are you able to fix the issue after modifying the banks in uboot source?

Please refer the Chapter 15.3 from OMAPL138 TRM

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Hi,

No it doesn't work. I need to understand file omapl138_lcdk.h configuration with LCDK.

I saw LCDK board uses SDRAM 64Mb x 16 with 8 banks:

- why does PHYS_SDRAM_1_SIZE do 128MB?

- why does CONFIG_MAX_RAM_BANK_SIZE do 512MB?

- why do you use CONFIG_NR_DRAM_BANKS to 1 instead of 8?

- why only this configuration works for loading uboot into DDR2 with my board

And too, into omapl138_lcdk.c I don't see functions which set structure gd like this for example :

gd->bd->bi_dram[0].start = PHYS_SDRAM_1;

gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

gd->ram_size = get_ram_size(...);

why?

Thanks

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

I tested tranferring into DDR2 with a file including the same bytes "1" (ascii) repeated up to reach size memory like kernel (2.3MB).

It seems writing is correct into DDR2. But when I transfert kernel; it doesn't work.

I wonder if the binary I transfert is good. Peraps there is a compressing file problem!
I took file "uImage" into linux-3.3-psp03.22.00.06.sdk/arch/arm/boot folder.

Regards

Sebastien

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

Have you tried to check the CRC ?

imi 0xC0700000

Try the following command in u-boot before run kernel.

1) Do kermit to transfer files over serial.

2) setenv verify no

3) bootm 0xC0700000

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Have you tried to check the CRC ?

yes but "Bad Header Checksum" appears

When I put "setenv verify no", i have the same error

"Bad Header Checksum
ERROR: can't get kernel image!"

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

Hi,

How do I do for changing number UART (uart2 to uart1) for linux console?

Thanks

Best regards

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi Sebastien,

Small request is that please don't put verify to all our answers/replies but put verify which reply gives really answered (helpful) your question, So that others get use of only that reply who is facing the same problem if any.

Thanks for you understanding.

Coming to the new question;

Please refer the ti old e2e post regarding console changes, It is only for UART0 but change to UART2 accordingly.

http://e2e.ti.com/support/embedded/linux/f/354/t/59241.aspx

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Ok I'll see that but before I would like to copy data from SDRAM to flash NAND 8 bits.

But it doesn't work!

example:

- DDR2 I have these datas at 0xc0700000 by typing command "md.b 0xc0700000 0x10":

0xc0700000 : AA 55 AA 55 ... AA 55

- for writing datas to NAND flash I do " nand write.e 0xc0700000 0x07000000 0x10"

- for reading datas from NAND to DDR2 at 0xc2000000 I do " nand read.e 0xc2000000 0x07000000 0x10"

Here hou have these datas at 0xc2000000 by cmd "md.b 0xc2000000 0x10"

0xc2000000 : AA FF AA FF ... AA FF

I'm the feeling "nand write" command writes datas by 16 bits into NAND whereas flash is only a 8 bits data!

do you have a solution for me?

thanks

Sebastien

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi,

I'm the feeling "nand write" command writes datas by 16 bits into NAND whereas flash is only a 8 bits data!

It won't behave at all,

If it so then you are not able to boot up the board even u-boot from NAND. Isn't it!

I assume that already you have modified the u-boot to 8bit NAND flash.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Hi,

Yes, I defined CONIG_SYS_NAND_BUSWIDTH_8_BIT into omapl138_lcdk.h for NAND flash.

I think the difference is I used sfh loader to copy UBOOT into NAND and UBOOT image works into DDR2.

For Kernel already included into DDR2 (via loadb command); it's the copy to NAND flash which doesn't work (with "nand write" command).

I wonder if there is not other things to do to avoid this problem!

Regards

Sebasien

0 Sebastien ASTRUC over 11 years ago in reply to Sebastien ASTRUC

Expert 1040 points

Hi,

I resolved error access into NAND flash 8 bits. I changed DAVINCI_ABCR_ASIZE_16BIT by DAVINCI_ABCR_ASIZE_8BIT in omapl138_lcdk.c

But to change UART number for linux it just remains to change file debug-macro.S. I don't know what I have to do
!

Could ou help me please

thanks

Best Regards

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi Sebastien,

Sounds good.

Thanks for your update.

Please create new thread for your issue.

0 Sebastien ASTRUC over 11 years ago in reply to Titusrathinaraj Stalin

Expert 1040 points

Sorry,

I forgot to let you files I modified...

Regards

http://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components-files/42/7455.Archive.7z

0 Titusrathinaraj Stalin over 11 years ago in reply to Sebastien ASTRUC

TI__Guru** 116100 points

Hi Sebastien,

Thank you for sharing the modified files, It could help others.

Please create new thread for your new issue.

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